An Architecture to Accelerate Convolution in Deep Neural Networks

In the past few years, the demand for real-time hardware implementations of deep neural networks (DNNs), especially convolutional neural networks (CNNs), has dramatically increased, thanks to their excellent performance on a wide range of recognition and classification tasks. When considering real-t...

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Veröffentlicht in:	IEEE transactions on circuits and systems. I, Regular papers Regular papers, 2018-04, Vol.65 (4), p.1349-1362
Hauptverfasser:	Ardakani, Arash, Condo, Carlo, Ahmadi, Mehdi, Gross, Warren J.
Format:	Artikel
Sprache:	eng
Schlagworte:	Accelerators Accuracy Artificial neural networks Classification CMOS Complexity theory Computer architecture Convolution Convolutional neural networks deep neural network Hardware hardware implementation Image classification machine learning Microprocessors Neural networks Neurons Object recognition pattern recognition Real time State of the art Three-dimensional displays very large scale integration (VLSI) Video data
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