A DRAM technology using MIM BST capacitor for 0.15 /spl mu/m DRAM generation and beyond

Recently, 1 Gb DRAM based on the 0.18 /spl mu/m technology node (generation) and 0.15 /spl mu/m technology node for 4 Gb DRAM have been successfully demonstrated. These two technology generations are based on MIS capacitors using Ta/sub 2/O/sub 5/ dielectric. The extension of Ta/sub 2/O/sub 5/ MIS c...

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Bibliographische Detailangaben

Hauptverfasser:	Kim, K.N., Kwak, D.H., Hwang, Y.S., Jeong, G.T., Chung, T.Y., Park, B.J., Chun, Y.S., Oh, J.H., Yoo, C.Y., Joo, B.S.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Annealing Binary search trees Capacitance Dielectrics Electrodes MIM capacitors Random access memory Sputter etching Temperature Topology
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