Hazard checking in pipelined processor designs using symbolic model checking

The high speed requirements on today's processors can be met by pipeline architectures, but pipeline structures cause hazards, which are their main drawback. In principle there are two ways to handle hazards: the compiler avoids hazard-causing code sequences or the hardware treats the hazard si...

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Bibliographische Detailangaben

Hauptverfasser:	Schonherr, J., Schreiber, I., Fordran, E., Straube, B.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Automata Binary decision diagrams Counting circuits Energy consumption Hardware Hazards Induction generators Pipeline processing Process design Software performance
Online-Zugang:	Volltext bestellen
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