An Amplified Offset Compensation Scheme and Its Application in a Track and Hold Circuit
This brief proposes a fully differential track and hold circuit using a new dc offset compensation scheme. It stores an amplified version of the offset during the hold phase, which is used in attenuated fashion during the track phase to compensate offset. This scheme is less sensitive to charge inje...
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| Veröffentlicht in: | IEEE transactions on circuits and systems. II, Express briefs Express briefs, 2018-04, Vol.65 (4), p.416-420 |
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| container_end_page | 420 |
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| container_issue | 4 |
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| container_title | IEEE transactions on circuits and systems. II, Express briefs |
| container_volume | 65 |
| creator | Pourashraf, Shirin Ramirez-Angulo, Jaime Cabrera-Galicia, Alfonso R. Lopez-Martin, Antonio J. Gonzalez-Carvajal, Ramon |
| description | This brief proposes a fully differential track and hold circuit using a new dc offset compensation scheme. It stores an amplified version of the offset during the hold phase, which is used in attenuated fashion during the track phase to compensate offset. This scheme is less sensitive to charge injection and other errors than conventional offset compensation schemes. Experimental results of a test chip in 0.18-μm CMOS technology verify the proposed scheme. |
| doi_str_mv | 10.1109/TCSII.2017.2695162 |
| format | Article |
| fullrecord | <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_ieee_primary_7904693</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>7904693</ieee_id><sourcerecordid>2021117997</sourcerecordid><originalsourceid>FETCH-LOGICAL-c339t-c8689978cf50b83f1c19c372b56d2058526df4c784f2796e0437adca9cd9f6303</originalsourceid><addsrcrecordid>eNo9kMtKAzEUhoMoWKsvoJuA66m5TG7LYVA7UOiiFZchzSSY2rmYTBe-vdNOcXV--C8HPgAeMVpgjNTLttxU1YIgLBaEK4Y5uQIzzJjMqFD4-qRzlQmRi1twl9IeIaIQJTPwWbSwaPpD8MHVcO19cgMsu6Z3bTJD6Fq4sV-ucdC0NayGBIt-DNvJCi00cBuN_T7by-5QwzJEewzDPbjx5pDcw-XOwcfb67ZcZqv1e1UWq8xSqobMSi6VEtJ6hnaSemyxslSQHeM1QUwywmufWyFzT4TiDuVUmNoaZWvlOUV0Dp6n3T52P0eXBr3vjrEdX2qCCMZYjPNjikwpG7uUovO6j6Ex8VdjpE8A9RmgPgHUF4Bj6WkqBefcf0EolHNF6R_mr2r3</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>2021117997</pqid></control><display><type>article</type><title>An Amplified Offset Compensation Scheme and Its Application in a Track and Hold Circuit</title><source>IEEE Electronic Library (IEL)</source><creator>Pourashraf, Shirin ; Ramirez-Angulo, Jaime ; Cabrera-Galicia, Alfonso R. ; Lopez-Martin, Antonio J. ; Gonzalez-Carvajal, Ramon</creator><creatorcontrib>Pourashraf, Shirin ; Ramirez-Angulo, Jaime ; Cabrera-Galicia, Alfonso R. ; Lopez-Martin, Antonio J. ; Gonzalez-Carvajal, Ramon</creatorcontrib><description>This brief proposes a fully differential track and hold circuit using a new dc offset compensation scheme. It stores an amplified version of the offset during the hold phase, which is used in attenuated fashion during the track phase to compensate offset. This scheme is less sensitive to charge injection and other errors than conventional offset compensation schemes. Experimental results of a test chip in 0.18-μm CMOS technology verify the proposed scheme.</description><identifier>ISSN: 1549-7747</identifier><identifier>EISSN: 1558-3791</identifier><identifier>DOI: 10.1109/TCSII.2017.2695162</identifier><identifier>CODEN: ICSPE5</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Capacitors ; Charge injection ; Clocks ; CMOS ; CMOS technology ; Compensation ; differential difference amplifier (DDA) ; Electronic mail ; mixed-signal circuits ; offset compensation ; Sample and hold (S/H) ; Switches ; Transistors</subject><ispartof>IEEE transactions on circuits and systems. II, Express briefs, 2018-04, Vol.65 (4), p.416-420</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2018</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c339t-c8689978cf50b83f1c19c372b56d2058526df4c784f2796e0437adca9cd9f6303</citedby><cites>FETCH-LOGICAL-c339t-c8689978cf50b83f1c19c372b56d2058526df4c784f2796e0437adca9cd9f6303</cites><orcidid>0000-0001-7629-0305 ; 0000-0001-5977-616X ; 0000-0001-8013-1171</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/7904693$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>315,781,785,797,27929,27930,54763</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/7904693$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Pourashraf, Shirin</creatorcontrib><creatorcontrib>Ramirez-Angulo, Jaime</creatorcontrib><creatorcontrib>Cabrera-Galicia, Alfonso R.</creatorcontrib><creatorcontrib>Lopez-Martin, Antonio J.</creatorcontrib><creatorcontrib>Gonzalez-Carvajal, Ramon</creatorcontrib><title>An Amplified Offset Compensation Scheme and Its Application in a Track and Hold Circuit</title><title>IEEE transactions on circuits and systems. II, Express briefs</title><addtitle>TCSII</addtitle><description>This brief proposes a fully differential track and hold circuit using a new dc offset compensation scheme. It stores an amplified version of the offset during the hold phase, which is used in attenuated fashion during the track phase to compensate offset. This scheme is less sensitive to charge injection and other errors than conventional offset compensation schemes. Experimental results of a test chip in 0.18-μm CMOS technology verify the proposed scheme.</description><subject>Capacitors</subject><subject>Charge injection</subject><subject>Clocks</subject><subject>CMOS</subject><subject>CMOS technology</subject><subject>Compensation</subject><subject>differential difference amplifier (DDA)</subject><subject>Electronic mail</subject><subject>mixed-signal circuits</subject><subject>offset compensation</subject><subject>Sample and hold (S/H)</subject><subject>Switches</subject><subject>Transistors</subject><issn>1549-7747</issn><issn>1558-3791</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2018</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kMtKAzEUhoMoWKsvoJuA66m5TG7LYVA7UOiiFZchzSSY2rmYTBe-vdNOcXV--C8HPgAeMVpgjNTLttxU1YIgLBaEK4Y5uQIzzJjMqFD4-qRzlQmRi1twl9IeIaIQJTPwWbSwaPpD8MHVcO19cgMsu6Z3bTJD6Fq4sV-ucdC0NayGBIt-DNvJCi00cBuN_T7by-5QwzJEewzDPbjx5pDcw-XOwcfb67ZcZqv1e1UWq8xSqobMSi6VEtJ6hnaSemyxslSQHeM1QUwywmufWyFzT4TiDuVUmNoaZWvlOUV0Dp6n3T52P0eXBr3vjrEdX2qCCMZYjPNjikwpG7uUovO6j6Ex8VdjpE8A9RmgPgHUF4Bj6WkqBefcf0EolHNF6R_mr2r3</recordid><startdate>20180401</startdate><enddate>20180401</enddate><creator>Pourashraf, Shirin</creator><creator>Ramirez-Angulo, Jaime</creator><creator>Cabrera-Galicia, Alfonso R.</creator><creator>Lopez-Martin, Antonio J.</creator><creator>Gonzalez-Carvajal, Ramon</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><orcidid>https://orcid.org/0000-0001-7629-0305</orcidid><orcidid>https://orcid.org/0000-0001-5977-616X</orcidid><orcidid>https://orcid.org/0000-0001-8013-1171</orcidid></search><sort><creationdate>20180401</creationdate><title>An Amplified Offset Compensation Scheme and Its Application in a Track and Hold Circuit</title><author>Pourashraf, Shirin ; Ramirez-Angulo, Jaime ; Cabrera-Galicia, Alfonso R. ; Lopez-Martin, Antonio J. ; Gonzalez-Carvajal, Ramon</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c339t-c8689978cf50b83f1c19c372b56d2058526df4c784f2796e0437adca9cd9f6303</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2018</creationdate><topic>Capacitors</topic><topic>Charge injection</topic><topic>Clocks</topic><topic>CMOS</topic><topic>CMOS technology</topic><topic>Compensation</topic><topic>differential difference amplifier (DDA)</topic><topic>Electronic mail</topic><topic>mixed-signal circuits</topic><topic>offset compensation</topic><topic>Sample and hold (S/H)</topic><topic>Switches</topic><topic>Transistors</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Pourashraf, Shirin</creatorcontrib><creatorcontrib>Ramirez-Angulo, Jaime</creatorcontrib><creatorcontrib>Cabrera-Galicia, Alfonso R.</creatorcontrib><creatorcontrib>Lopez-Martin, Antonio J.</creatorcontrib><creatorcontrib>Gonzalez-Carvajal, Ramon</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE transactions on circuits and systems. II, Express briefs</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Pourashraf, Shirin</au><au>Ramirez-Angulo, Jaime</au><au>Cabrera-Galicia, Alfonso R.</au><au>Lopez-Martin, Antonio J.</au><au>Gonzalez-Carvajal, Ramon</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>An Amplified Offset Compensation Scheme and Its Application in a Track and Hold Circuit</atitle><jtitle>IEEE transactions on circuits and systems. II, Express briefs</jtitle><stitle>TCSII</stitle><date>2018-04-01</date><risdate>2018</risdate><volume>65</volume><issue>4</issue><spage>416</spage><epage>420</epage><pages>416-420</pages><issn>1549-7747</issn><eissn>1558-3791</eissn><coden>ICSPE5</coden><abstract>This brief proposes a fully differential track and hold circuit using a new dc offset compensation scheme. It stores an amplified version of the offset during the hold phase, which is used in attenuated fashion during the track phase to compensate offset. This scheme is less sensitive to charge injection and other errors than conventional offset compensation schemes. Experimental results of a test chip in 0.18-μm CMOS technology verify the proposed scheme.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TCSII.2017.2695162</doi><tpages>5</tpages><orcidid>https://orcid.org/0000-0001-7629-0305</orcidid><orcidid>https://orcid.org/0000-0001-5977-616X</orcidid><orcidid>https://orcid.org/0000-0001-8013-1171</orcidid><oa>free_for_read</oa></addata></record> |
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| identifier | ISSN: 1549-7747 |
| ispartof | IEEE transactions on circuits and systems. II, Express briefs, 2018-04, Vol.65 (4), p.416-420 |
| issn | 1549-7747 1558-3791 |
| language | eng |
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| source | IEEE Electronic Library (IEL) |
| subjects | Capacitors Charge injection Clocks CMOS CMOS technology Compensation differential difference amplifier (DDA) Electronic mail mixed-signal circuits offset compensation Sample and hold (S/H) Switches Transistors |
| title | An Amplified Offset Compensation Scheme and Its Application in a Track and Hold Circuit |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-15T01%3A37%3A44IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=An%20Amplified%20Offset%20Compensation%20Scheme%20and%20Its%20Application%20in%20a%20Track%20and%20Hold%20Circuit&rft.jtitle=IEEE%20transactions%20on%20circuits%20and%20systems.%20II,%20Express%20briefs&rft.au=Pourashraf,%20Shirin&rft.date=2018-04-01&rft.volume=65&rft.issue=4&rft.spage=416&rft.epage=420&rft.pages=416-420&rft.issn=1549-7747&rft.eissn=1558-3791&rft.coden=ICSPE5&rft_id=info:doi/10.1109/TCSII.2017.2695162&rft_dat=%3Cproquest_RIE%3E2021117997%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=2021117997&rft_id=info:pmid/&rft_ieee_id=7904693&rfr_iscdi=true |