Fast hardware-software co-simulation using VHDL models

We describe a technique for hardware-software co-simulation that is almost cycle-accurate, and does nor require the use of interprocess communication for a C language interface for the software components. Software is modeled by using behavioral VHDL constructs, annotated with timing information der...

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Hauptverfasser: Tabbara, B., Sgroi, M., Sangiovanni-Vincentelli, A., Filippi, E., Lavagno, L.
Format: Tagungsbericht
Sprache:eng
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