Energy Efficient Spiking Temporal Encoder Design for Neuromorphic Computing Systems

Neuromorphic computing hardware has undergone a rapid development and progress in the past few years. One of the key components in neuromorphic computing systems is the neural encoder which transforms sensory information into spike trains. In this paper, both rate encoding and temporal encoding sche...

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Veröffentlicht in:IEEE transactions on multi-scale computing systems 2016-10, Vol.2 (4), p.265-276
Hauptverfasser: Zhao, Chenyuan, Wysocki, Bryant T., Thiem, Clare D., McDonald, Nathan R., Li, Jialing, Liu, Lingjia, Yi, Yang
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container_title IEEE transactions on multi-scale computing systems
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creator Zhao, Chenyuan
Wysocki, Bryant T.
Thiem, Clare D.
McDonald, Nathan R.
Li, Jialing
Liu, Lingjia
Yi, Yang
description Neuromorphic computing hardware has undergone a rapid development and progress in the past few years. One of the key components in neuromorphic computing systems is the neural encoder which transforms sensory information into spike trains. In this paper, both rate encoding and temporal encoding schemes are discussed. Two novel temporal encoding schemes, parallel and iteration, are presented. The power consumption of the encoder has been significantly reduced by combing the iteration encoding and low sampling rate in advanced complementary metal-oxide semiconductor (CMOS) nano-technology. Both the simulation and measurement results show the accuracy and efficiency of the proposed encoding circuits. The proposed iteration encoder has immediate applicability as a general purpose input encoder for a reservoir computing system.
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subjects Biomembranes
CMOS
CMOS technology
Encoding
iteration scheme
Iterative methods
Mathematical model
Neuromorphics
Neurons
parallel scheme
rate encoding
Semiconductor device modeling
Temporal encoding
title Energy Efficient Spiking Temporal Encoder Design for Neuromorphic Computing Systems
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