Defect Characterization of PEALD High-k ZrO2 Films Fabricated on III-V Materials
To enable scalable MOSFET technology in III-V semiconductor platforms, high quality semiconductor-oxide interfaces are essential. In this paper, a novel low-temperature plasma-enhanced atomic layer deposition (PEALD) technique was applied to deposit nanoscale high-k dielectrics on several III-V subs...
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| Veröffentlicht in: | IEEE transactions on semiconductor manufacturing 2016-11, Vol.29 (4), p.355-362 |
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| creator | Rezazadeh, Vallen G. Bothe, Kyle M. Afshar, Amir Cadien, Kenneth C. Barlage, Douglas W. |
| description | To enable scalable MOSFET technology in III-V semiconductor platforms, high quality semiconductor-oxide interfaces are essential. In this paper, a novel low-temperature plasma-enhanced atomic layer deposition (PEALD) technique was applied to deposit nanoscale high-k dielectrics on several III-V substrates, including InP, GaAs, InAs, and GaN. Approximately 7 nm of ZrO2 was grown and patterned to form MOSCAP structures, which were subsequently analyzed through electrical characterization to evaluate dielectric and interface quality. The oxide films fabricated were found to have interface trap densities ranging from 10 10 - 10 13 eV -1 cm -2 , and showed high capacitance densities (~ 2.5 μF/cm 2 ). GaN and InP MOSCAPs with ZrO 2 dielectric layers were found to have gate currents in line with direct tunneling phenomena and MOS mobilities approaching that of doped bulk semiconductors. Scaled InP MOSFET devices using these experimental values were also simulated using an optimized device structure. |
| doi_str_mv | 10.1109/TSM.2016.2601304 |
| format | Article |
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In this paper, a novel low-temperature plasma-enhanced atomic layer deposition (PEALD) technique was applied to deposit nanoscale high-k dielectrics on several III-V substrates, including InP, GaAs, InAs, and GaN. Approximately 7 nm of ZrO2 was grown and patterned to form MOSCAP structures, which were subsequently analyzed through electrical characterization to evaluate dielectric and interface quality. The oxide films fabricated were found to have interface trap densities ranging from 10 10 - 10 13 eV -1 cm -2 , and showed high capacitance densities (~ 2.5 μF/cm 2 ). GaN and InP MOSCAPs with ZrO 2 dielectric layers were found to have gate currents in line with direct tunneling phenomena and MOS mobilities approaching that of doped bulk semiconductors. Scaled InP MOSFET devices using these experimental values were also simulated using an optimized device structure.</description><identifier>ISSN: 0894-6507</identifier><identifier>EISSN: 1558-2345</identifier><identifier>DOI: 10.1109/TSM.2016.2601304</identifier><identifier>CODEN: ITSMED</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Atomic layer epitaxy ; Bulk density ; Dielectrics ; Electrical properties ; Gallium arsenide ; Gallium nitride ; Gallium nitrides ; GaN ; Gate oxides ; Group III-V semiconductors ; High K dielectric materials ; high-k ; III-V semiconductor materials ; Indium phosphide ; Indium phosphides ; InP ; Low temperature ; Metal oxide semiconductors ; MOS capacitors ; MOS devices ; MOSFET ; MOSFETs ; Oxide coatings ; PEALD ; Substrates ; Zirconium dioxide ; ZrO2</subject><ispartof>IEEE transactions on semiconductor manufacturing, 2016-11, Vol.29 (4), p.355-362</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2016</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/7547265$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/7547265$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Rezazadeh, Vallen G.</creatorcontrib><creatorcontrib>Bothe, Kyle M.</creatorcontrib><creatorcontrib>Afshar, Amir</creatorcontrib><creatorcontrib>Cadien, Kenneth C.</creatorcontrib><creatorcontrib>Barlage, Douglas W.</creatorcontrib><title>Defect Characterization of PEALD High-k ZrO2 Films Fabricated on III-V Materials</title><title>IEEE transactions on semiconductor manufacturing</title><addtitle>TSM</addtitle><description>To enable scalable MOSFET technology in III-V semiconductor platforms, high quality semiconductor-oxide interfaces are essential. In this paper, a novel low-temperature plasma-enhanced atomic layer deposition (PEALD) technique was applied to deposit nanoscale high-k dielectrics on several III-V substrates, including InP, GaAs, InAs, and GaN. Approximately 7 nm of ZrO2 was grown and patterned to form MOSCAP structures, which were subsequently analyzed through electrical characterization to evaluate dielectric and interface quality. The oxide films fabricated were found to have interface trap densities ranging from 10 10 - 10 13 eV -1 cm -2 , and showed high capacitance densities (~ 2.5 μF/cm 2 ). GaN and InP MOSCAPs with ZrO 2 dielectric layers were found to have gate currents in line with direct tunneling phenomena and MOS mobilities approaching that of doped bulk semiconductors. Scaled InP MOSFET devices using these experimental values were also simulated using an optimized device structure.</description><subject>Atomic layer epitaxy</subject><subject>Bulk density</subject><subject>Dielectrics</subject><subject>Electrical properties</subject><subject>Gallium arsenide</subject><subject>Gallium nitride</subject><subject>Gallium nitrides</subject><subject>GaN</subject><subject>Gate oxides</subject><subject>Group III-V semiconductors</subject><subject>High K dielectric materials</subject><subject>high-k</subject><subject>III-V semiconductor materials</subject><subject>Indium phosphide</subject><subject>Indium phosphides</subject><subject>InP</subject><subject>Low temperature</subject><subject>Metal oxide semiconductors</subject><subject>MOS capacitors</subject><subject>MOS devices</subject><subject>MOSFET</subject><subject>MOSFETs</subject><subject>Oxide coatings</subject><subject>PEALD</subject><subject>Substrates</subject><subject>Zirconium dioxide</subject><subject>ZrO2</subject><issn>0894-6507</issn><issn>1558-2345</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2016</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNotjjtPwzAUhS0EEqGwI7FYYnbx49pOxqoPGilVK1EYWKKbxKEubVOcdIBfT1CZzvKdcz5C7gUfCsGTp_XLYii5MENpuFAcLkgktI6ZVKAvScTjBJjR3F6Tm7bdci4AEhuR1cTVruzoeIMBy84F_4Odbw60qelqOsomdO4_NuyTvoelpDO_27d0hkXwJXauoj2Ypil7owv86-KuvSVXdR_u7j8H5HU2XY_nLFs-p-NRxrzkqmPWmV7SVKayClBWWtlaaAmikDFgURosLHBnuKmTXhRAlFDUWiQWLRYa1IA8nnePofk6ubbLt80pHPrLXMRKxyoBGffUw5nyzrn8GPwew3duNVhptPoFktlW0g</recordid><startdate>201611</startdate><enddate>201611</enddate><creator>Rezazadeh, Vallen G.</creator><creator>Bothe, Kyle M.</creator><creator>Afshar, Amir</creator><creator>Cadien, Kenneth C.</creator><creator>Barlage, Douglas W.</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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In this paper, a novel low-temperature plasma-enhanced atomic layer deposition (PEALD) technique was applied to deposit nanoscale high-k dielectrics on several III-V substrates, including InP, GaAs, InAs, and GaN. Approximately 7 nm of ZrO2 was grown and patterned to form MOSCAP structures, which were subsequently analyzed through electrical characterization to evaluate dielectric and interface quality. The oxide films fabricated were found to have interface trap densities ranging from 10 10 - 10 13 eV -1 cm -2 , and showed high capacitance densities (~ 2.5 μF/cm 2 ). GaN and InP MOSCAPs with ZrO 2 dielectric layers were found to have gate currents in line with direct tunneling phenomena and MOS mobilities approaching that of doped bulk semiconductors. Scaled InP MOSFET devices using these experimental values were also simulated using an optimized device structure.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TSM.2016.2601304</doi><tpages>8</tpages></addata></record> |
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| subjects | Atomic layer epitaxy Bulk density Dielectrics Electrical properties Gallium arsenide Gallium nitride Gallium nitrides GaN Gate oxides Group III-V semiconductors High K dielectric materials high-k III-V semiconductor materials Indium phosphide Indium phosphides InP Low temperature Metal oxide semiconductors MOS capacitors MOS devices MOSFET MOSFETs Oxide coatings PEALD Substrates Zirconium dioxide ZrO2 |
| title | Defect Characterization of PEALD High-k ZrO2 Films Fabricated on III-V Materials |
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