A 5.6 nV/ \surd Hz Chopper Operational Amplifier Achieving a 0.5 \mu V Maximum Offset Over Rail-to-Rail Input Range With Adaptive Clock Boosting Technique
This paper presents a standalone 5.6 nV/√Hz chopper op-amp that operates from a 2.1-5.5 V supply. Frequency compensation is achieved in a power-and area-efficient manner by using a current attenuator and a dummy differential output. As a result, the overall op-amp only consumes 1.4 mA supply current...
Gespeichert in:
| Veröffentlicht in: | IEEE journal of solid-state circuits 2016-09, Vol.51 (9), p.2119-2128 |
|---|---|
| 1. Verfasser: | |
| Format: | Artikel |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 2128 |
|---|---|
| container_issue | 9 |
| container_start_page | 2119 |
| container_title | IEEE journal of solid-state circuits |
| container_volume | 51 |
| creator | Kusuda, Yoshinori |
| description | This paper presents a standalone 5.6 nV/√Hz chopper op-amp that operates from a 2.1-5.5 V supply. Frequency compensation is achieved in a power-and area-efficient manner by using a current attenuator and a dummy differential output. As a result, the overall op-amp only consumes 1.4 mA supply current and 1.26 mm2 die area. Up-modulated chopper ripple is suppressed by a local feedback technique, called auto correction feedback (ACFB). The charge injection of the input chopping switches can cause residual offset voltages, especially with the wider switches needed to reduce thermal noise. By employing an adaptive clock boosting technique with NMOS input switches, the amount of charge injection is minimized and kept constant as the input common-mode voltage changes. This results in a 0.5 μV maximum offset and 0.015 μV/°C maximum drift over the amplifier's entire rail-to-rail input common-mode range and from -40 °C to 125 °C. The design is implemented in a 0.35 μm CMOS process augmented by 5 V CMOS transistors. |
| doi_str_mv | 10.1109/JSSC.2016.2577626 |
| format | Article |
| fullrecord | <record><control><sourceid>crossref_RIE</sourceid><recordid>TN_cdi_ieee_primary_7501504</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>7501504</ieee_id><sourcerecordid>10_1109_JSSC_2016_2577626</sourcerecordid><originalsourceid>FETCH-LOGICAL-c1104-48981f2a158609dd55e8f533b9c2fc5bb502e744d43c605c9609c0c4fbd89b053</originalsourceid><addsrcrecordid>eNo9kN1Kw0AQhRdRsFYfQLyZF0i6m-zm5zIGtZVKwNbqRSFsNrvNav7MT1Efxac1ocWbOczhnIH5ELom2CQE-7PH1So0LUwc02Ku61jOCZoQxjyDuPbbKZpgTDzDtzA-Rxdt-z6slHpkgn4DYKYD5WYG27ZvUpj_QJhVdS0biIbBO12VPIegqHOt9OAGItNyr8sdcMAmg23Rwwae-Jcu-gIipVrZQbQfks9c50ZXGaPCoqz7brDKnYRX3WUQpLzu9F5CmFfiA26rqu3Gq2spslJ_9vISnSmet_LqqFP0cn-3DufGMnpYhMHSEMPn1KCe7xFlccI8B_tpypj0FLPtxBeWEixJGLakS2lKbeFgJvwhJbCgKkk9P8HMniJyuCuaqm0bqeK60QVvvmOC4xFuPMKNR7jxEe7QuTl0tJTyP-8yTBim9h_mcXT-</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype></control><display><type>article</type><title>A 5.6 nV/ \surd Hz Chopper Operational Amplifier Achieving a 0.5 \mu V Maximum Offset Over Rail-to-Rail Input Range With Adaptive Clock Boosting Technique</title><source>IEEE Electronic Library (IEL)</source><creator>Kusuda, Yoshinori</creator><creatorcontrib>Kusuda, Yoshinori</creatorcontrib><description>This paper presents a standalone 5.6 nV/√Hz chopper op-amp that operates from a 2.1-5.5 V supply. Frequency compensation is achieved in a power-and area-efficient manner by using a current attenuator and a dummy differential output. As a result, the overall op-amp only consumes 1.4 mA supply current and 1.26 mm2 die area. Up-modulated chopper ripple is suppressed by a local feedback technique, called auto correction feedback (ACFB). The charge injection of the input chopping switches can cause residual offset voltages, especially with the wider switches needed to reduce thermal noise. By employing an adaptive clock boosting technique with NMOS input switches, the amount of charge injection is minimized and kept constant as the input common-mode voltage changes. This results in a 0.5 μV maximum offset and 0.015 μV/°C maximum drift over the amplifier's entire rail-to-rail input common-mode range and from -40 °C to 125 °C. The design is implemented in a 0.35 μm CMOS process augmented by 5 V CMOS transistors.</description><identifier>ISSN: 0018-9200</identifier><identifier>EISSN: 1558-173X</identifier><identifier>DOI: 10.1109/JSSC.2016.2577626</identifier><identifier>CODEN: IJSCBC</identifier><language>eng</language><publisher>IEEE</publisher><subject>Attenuators ; Bandwidth ; Capacitors ; Charge injection ; chopper ; Choppers (circuits) ; clock boosting ; Clocks ; frequency compensation ; high CMRR ; low noise ; low offset ; operational amplifier ; rail-to-rail ; ripple suppression ; Thermal noise ; Transconductance</subject><ispartof>IEEE journal of solid-state circuits, 2016-09, Vol.51 (9), p.2119-2128</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c1104-48981f2a158609dd55e8f533b9c2fc5bb502e744d43c605c9609c0c4fbd89b053</citedby><cites>FETCH-LOGICAL-c1104-48981f2a158609dd55e8f533b9c2fc5bb502e744d43c605c9609c0c4fbd89b053</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/7501504$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,777,781,793,27906,27907,54740</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/7501504$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Kusuda, Yoshinori</creatorcontrib><title>A 5.6 nV/ \surd Hz Chopper Operational Amplifier Achieving a 0.5 \mu V Maximum Offset Over Rail-to-Rail Input Range With Adaptive Clock Boosting Technique</title><title>IEEE journal of solid-state circuits</title><addtitle>JSSC</addtitle><description>This paper presents a standalone 5.6 nV/√Hz chopper op-amp that operates from a 2.1-5.5 V supply. Frequency compensation is achieved in a power-and area-efficient manner by using a current attenuator and a dummy differential output. As a result, the overall op-amp only consumes 1.4 mA supply current and 1.26 mm2 die area. Up-modulated chopper ripple is suppressed by a local feedback technique, called auto correction feedback (ACFB). The charge injection of the input chopping switches can cause residual offset voltages, especially with the wider switches needed to reduce thermal noise. By employing an adaptive clock boosting technique with NMOS input switches, the amount of charge injection is minimized and kept constant as the input common-mode voltage changes. This results in a 0.5 μV maximum offset and 0.015 μV/°C maximum drift over the amplifier's entire rail-to-rail input common-mode range and from -40 °C to 125 °C. The design is implemented in a 0.35 μm CMOS process augmented by 5 V CMOS transistors.</description><subject>Attenuators</subject><subject>Bandwidth</subject><subject>Capacitors</subject><subject>Charge injection</subject><subject>chopper</subject><subject>Choppers (circuits)</subject><subject>clock boosting</subject><subject>Clocks</subject><subject>frequency compensation</subject><subject>high CMRR</subject><subject>low noise</subject><subject>low offset</subject><subject>operational amplifier</subject><subject>rail-to-rail</subject><subject>ripple suppression</subject><subject>Thermal noise</subject><subject>Transconductance</subject><issn>0018-9200</issn><issn>1558-173X</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2016</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kN1Kw0AQhRdRsFYfQLyZF0i6m-zm5zIGtZVKwNbqRSFsNrvNav7MT1Efxac1ocWbOczhnIH5ELom2CQE-7PH1So0LUwc02Ku61jOCZoQxjyDuPbbKZpgTDzDtzA-Rxdt-z6slHpkgn4DYKYD5WYG27ZvUpj_QJhVdS0biIbBO12VPIegqHOt9OAGItNyr8sdcMAmg23Rwwae-Jcu-gIipVrZQbQfks9c50ZXGaPCoqz7brDKnYRX3WUQpLzu9F5CmFfiA26rqu3Gq2spslJ_9vISnSmet_LqqFP0cn-3DufGMnpYhMHSEMPn1KCe7xFlccI8B_tpypj0FLPtxBeWEixJGLakS2lKbeFgJvwhJbCgKkk9P8HMniJyuCuaqm0bqeK60QVvvmOC4xFuPMKNR7jxEe7QuTl0tJTyP-8yTBim9h_mcXT-</recordid><startdate>201609</startdate><enddate>201609</enddate><creator>Kusuda, Yoshinori</creator><general>IEEE</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>201609</creationdate><title>A 5.6 nV/ \surd Hz Chopper Operational Amplifier Achieving a 0.5 \mu V Maximum Offset Over Rail-to-Rail Input Range With Adaptive Clock Boosting Technique</title><author>Kusuda, Yoshinori</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c1104-48981f2a158609dd55e8f533b9c2fc5bb502e744d43c605c9609c0c4fbd89b053</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2016</creationdate><topic>Attenuators</topic><topic>Bandwidth</topic><topic>Capacitors</topic><topic>Charge injection</topic><topic>chopper</topic><topic>Choppers (circuits)</topic><topic>clock boosting</topic><topic>Clocks</topic><topic>frequency compensation</topic><topic>high CMRR</topic><topic>low noise</topic><topic>low offset</topic><topic>operational amplifier</topic><topic>rail-to-rail</topic><topic>ripple suppression</topic><topic>Thermal noise</topic><topic>Transconductance</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Kusuda, Yoshinori</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><jtitle>IEEE journal of solid-state circuits</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Kusuda, Yoshinori</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A 5.6 nV/ \surd Hz Chopper Operational Amplifier Achieving a 0.5 \mu V Maximum Offset Over Rail-to-Rail Input Range With Adaptive Clock Boosting Technique</atitle><jtitle>IEEE journal of solid-state circuits</jtitle><stitle>JSSC</stitle><date>2016-09</date><risdate>2016</risdate><volume>51</volume><issue>9</issue><spage>2119</spage><epage>2128</epage><pages>2119-2128</pages><issn>0018-9200</issn><eissn>1558-173X</eissn><coden>IJSCBC</coden><abstract>This paper presents a standalone 5.6 nV/√Hz chopper op-amp that operates from a 2.1-5.5 V supply. Frequency compensation is achieved in a power-and area-efficient manner by using a current attenuator and a dummy differential output. As a result, the overall op-amp only consumes 1.4 mA supply current and 1.26 mm2 die area. Up-modulated chopper ripple is suppressed by a local feedback technique, called auto correction feedback (ACFB). The charge injection of the input chopping switches can cause residual offset voltages, especially with the wider switches needed to reduce thermal noise. By employing an adaptive clock boosting technique with NMOS input switches, the amount of charge injection is minimized and kept constant as the input common-mode voltage changes. This results in a 0.5 μV maximum offset and 0.015 μV/°C maximum drift over the amplifier's entire rail-to-rail input common-mode range and from -40 °C to 125 °C. The design is implemented in a 0.35 μm CMOS process augmented by 5 V CMOS transistors.</abstract><pub>IEEE</pub><doi>10.1109/JSSC.2016.2577626</doi><tpages>10</tpages></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISSN: 0018-9200 |
| ispartof | IEEE journal of solid-state circuits, 2016-09, Vol.51 (9), p.2119-2128 |
| issn | 0018-9200 1558-173X |
| language | eng |
| recordid | cdi_ieee_primary_7501504 |
| source | IEEE Electronic Library (IEL) |
| subjects | Attenuators Bandwidth Capacitors Charge injection chopper Choppers (circuits) clock boosting Clocks frequency compensation high CMRR low noise low offset operational amplifier rail-to-rail ripple suppression Thermal noise Transconductance |
| title | A 5.6 nV/ \surd Hz Chopper Operational Amplifier Achieving a 0.5 \mu V Maximum Offset Over Rail-to-Rail Input Range With Adaptive Clock Boosting Technique |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-17T09%3A35%3A44IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-crossref_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=A%205.6%20nV/%20%5Csurd%20Hz%20Chopper%20Operational%20Amplifier%20Achieving%20a%200.5%20%5Cmu%20V%20Maximum%20Offset%20Over%20Rail-to-Rail%20Input%20Range%20With%20Adaptive%20Clock%20Boosting%20Technique&rft.jtitle=IEEE%20journal%20of%20solid-state%20circuits&rft.au=Kusuda,%20Yoshinori&rft.date=2016-09&rft.volume=51&rft.issue=9&rft.spage=2119&rft.epage=2128&rft.pages=2119-2128&rft.issn=0018-9200&rft.eissn=1558-173X&rft.coden=IJSCBC&rft_id=info:doi/10.1109/JSSC.2016.2577626&rft_dat=%3Ccrossref_RIE%3E10_1109_JSSC_2016_2577626%3C/crossref_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=7501504&rfr_iscdi=true |