A high-frequency fully differential BiCMOS operational amplifier
A high-frequency fully differential BiCMOS operational amplifier design for use in switched-capacitor circuits is presented. The operational amplifier is integrated in a 3.0-GHz, 2- mu m BiCMOS process with an active die area of 1.0 mm*1.2 mm. This BiCMOS op amp offers an infinite input resistance,...
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| Veröffentlicht in: | IEEE journal of solid-state circuits 1991-03, Vol.26 (3), p.203-208 |
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| container_end_page | 208 |
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| container_issue | 3 |
| container_start_page | 203 |
| container_title | IEEE journal of solid-state circuits |
| container_volume | 26 |
| creator | Karanicolas, A.N. O, K.K. Wang, J.Y.A. Lee, H.-S. Reif, R.L. |
| description | A high-frequency fully differential BiCMOS operational amplifier design for use in switched-capacitor circuits is presented. The operational amplifier is integrated in a 3.0-GHz, 2- mu m BiCMOS process with an active die area of 1.0 mm*1.2 mm. This BiCMOS op amp offers an infinite input resistance, a DC gain of 100 dB, a unity-gain frequency of 90 MHz with 45 degrees phase margin, and a slew rate of 150 V/ mu s. The differential output range is 12 V. The circuit is operated from a +or-5-V power supply and dissipates 125 mW. The op amp is unity-gain stable with 7 pF of capacitive loading at each output. The op amp is a two-stage, pole-split frequency compensated design that uses a PMOS input stage for infinite input resistance and an n-p-n bipolar second stage for high gain and high bandwidth. The frequency compensation network serves both the differential- and common-mode amplifiers so the differential- and common-mode amplifier dynamics are similar. A dynamic switched-capacitor common-mode feedback scheme is used to set the output common-mode level of the first and second stages.< > |
| doi_str_mv | 10.1109/4.74997 |
| format | Article |
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The operational amplifier is integrated in a 3.0-GHz, 2- mu m BiCMOS process with an active die area of 1.0 mm*1.2 mm. This BiCMOS op amp offers an infinite input resistance, a DC gain of 100 dB, a unity-gain frequency of 90 MHz with 45 degrees phase margin, and a slew rate of 150 V/ mu s. The differential output range is 12 V. The circuit is operated from a +or-5-V power supply and dissipates 125 mW. The op amp is unity-gain stable with 7 pF of capacitive loading at each output. The op amp is a two-stage, pole-split frequency compensated design that uses a PMOS input stage for infinite input resistance and an n-p-n bipolar second stage for high gain and high bandwidth. The frequency compensation network serves both the differential- and common-mode amplifiers so the differential- and common-mode amplifier dynamics are similar. A dynamic switched-capacitor common-mode feedback scheme is used to set the output common-mode level of the first and second stages.< ></description><identifier>ISSN: 0018-9200</identifier><identifier>EISSN: 1558-173X</identifier><identifier>DOI: 10.1109/4.74997</identifier><identifier>CODEN: IJSCBC</identifier><language>eng</language><publisher>IEEE</publisher><subject>Analog circuits ; BiCMOS integrated circuits ; CMOS analog integrated circuits ; CMOS logic circuits ; CMOS process ; Differential amplifiers ; Frequency ; MOS devices ; Operational amplifiers ; Switching circuits</subject><ispartof>IEEE journal of solid-state circuits, 1991-03, Vol.26 (3), p.203-208</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c272t-2f934abc5f414166203d31e691fadbeb7c01cf47dc3c38acb03b48975a710343</citedby><cites>FETCH-LOGICAL-c272t-2f934abc5f414166203d31e691fadbeb7c01cf47dc3c38acb03b48975a710343</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/74997$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/74997$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Karanicolas, A.N.</creatorcontrib><creatorcontrib>O, K.K.</creatorcontrib><creatorcontrib>Wang, J.Y.A.</creatorcontrib><creatorcontrib>Lee, H.-S.</creatorcontrib><creatorcontrib>Reif, R.L.</creatorcontrib><title>A high-frequency fully differential BiCMOS operational amplifier</title><title>IEEE journal of solid-state circuits</title><addtitle>JSSC</addtitle><description>A high-frequency fully differential BiCMOS operational amplifier design for use in switched-capacitor circuits is presented. The operational amplifier is integrated in a 3.0-GHz, 2- mu m BiCMOS process with an active die area of 1.0 mm*1.2 mm. This BiCMOS op amp offers an infinite input resistance, a DC gain of 100 dB, a unity-gain frequency of 90 MHz with 45 degrees phase margin, and a slew rate of 150 V/ mu s. The differential output range is 12 V. The circuit is operated from a +or-5-V power supply and dissipates 125 mW. The op amp is unity-gain stable with 7 pF of capacitive loading at each output. The op amp is a two-stage, pole-split frequency compensated design that uses a PMOS input stage for infinite input resistance and an n-p-n bipolar second stage for high gain and high bandwidth. The frequency compensation network serves both the differential- and common-mode amplifiers so the differential- and common-mode amplifier dynamics are similar. A dynamic switched-capacitor common-mode feedback scheme is used to set the output common-mode level of the first and second stages.< ></description><subject>Analog circuits</subject><subject>BiCMOS integrated circuits</subject><subject>CMOS analog integrated circuits</subject><subject>CMOS logic circuits</subject><subject>CMOS process</subject><subject>Differential amplifiers</subject><subject>Frequency</subject><subject>MOS devices</subject><subject>Operational amplifiers</subject><subject>Switching circuits</subject><issn>0018-9200</issn><issn>1558-173X</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1991</creationdate><recordtype>article</recordtype><recordid>eNo90D1PwzAQBmALgUQpiJktE0wpvtip7Y1S8SUVdaADm-U4Z2rkJsFOh_57AkFMp7t7dDq9hFwCnQFQdctngisljsgEylLmINj7MZlQCjJXBaWn5Cylz6HlXMKE3C2yrf_Y5i7i1x4be8jcPoRDVnvnMGLTexOye798Xb9lbYfR9L5thpHZdcE7j_GcnDgTEl781SnZPD5sls_5av30slyscluIos8Lpxg3lS0dBw7zeUFZzQDnCpypK6yEpWAdF7VllkljK8oqLpUojQDKOJuS6_FsF9vh0dTrnU8WQzANtvukC8mYBCYHeDNCG9uUIjrdRb8z8aCB6p-ANNe_AQ3yapQeEf_VuPsG2OZfnA</recordid><startdate>19910301</startdate><enddate>19910301</enddate><creator>Karanicolas, A.N.</creator><creator>O, K.K.</creator><creator>Wang, J.Y.A.</creator><creator>Lee, H.-S.</creator><creator>Reif, R.L.</creator><general>IEEE</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope></search><sort><creationdate>19910301</creationdate><title>A high-frequency fully differential BiCMOS operational amplifier</title><author>Karanicolas, A.N. ; O, K.K. ; Wang, J.Y.A. ; Lee, H.-S. ; Reif, R.L.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c272t-2f934abc5f414166203d31e691fadbeb7c01cf47dc3c38acb03b48975a710343</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1991</creationdate><topic>Analog circuits</topic><topic>BiCMOS integrated circuits</topic><topic>CMOS analog integrated circuits</topic><topic>CMOS logic circuits</topic><topic>CMOS process</topic><topic>Differential amplifiers</topic><topic>Frequency</topic><topic>MOS devices</topic><topic>Operational amplifiers</topic><topic>Switching circuits</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Karanicolas, A.N.</creatorcontrib><creatorcontrib>O, K.K.</creatorcontrib><creatorcontrib>Wang, J.Y.A.</creatorcontrib><creatorcontrib>Lee, H.-S.</creatorcontrib><creatorcontrib>Reif, R.L.</creatorcontrib><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE journal of solid-state circuits</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Karanicolas, A.N.</au><au>O, K.K.</au><au>Wang, J.Y.A.</au><au>Lee, H.-S.</au><au>Reif, R.L.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A high-frequency fully differential BiCMOS operational amplifier</atitle><jtitle>IEEE journal of solid-state circuits</jtitle><stitle>JSSC</stitle><date>1991-03-01</date><risdate>1991</risdate><volume>26</volume><issue>3</issue><spage>203</spage><epage>208</epage><pages>203-208</pages><issn>0018-9200</issn><eissn>1558-173X</eissn><coden>IJSCBC</coden><abstract>A high-frequency fully differential BiCMOS operational amplifier design for use in switched-capacitor circuits is presented. The operational amplifier is integrated in a 3.0-GHz, 2- mu m BiCMOS process with an active die area of 1.0 mm*1.2 mm. This BiCMOS op amp offers an infinite input resistance, a DC gain of 100 dB, a unity-gain frequency of 90 MHz with 45 degrees phase margin, and a slew rate of 150 V/ mu s. The differential output range is 12 V. The circuit is operated from a +or-5-V power supply and dissipates 125 mW. The op amp is unity-gain stable with 7 pF of capacitive loading at each output. The op amp is a two-stage, pole-split frequency compensated design that uses a PMOS input stage for infinite input resistance and an n-p-n bipolar second stage for high gain and high bandwidth. The frequency compensation network serves both the differential- and common-mode amplifiers so the differential- and common-mode amplifier dynamics are similar. A dynamic switched-capacitor common-mode feedback scheme is used to set the output common-mode level of the first and second stages.< ></abstract><pub>IEEE</pub><doi>10.1109/4.74997</doi><tpages>6</tpages></addata></record> |
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| identifier | ISSN: 0018-9200 |
| ispartof | IEEE journal of solid-state circuits, 1991-03, Vol.26 (3), p.203-208 |
| issn | 0018-9200 1558-173X |
| language | eng |
| recordid | cdi_ieee_primary_74997 |
| source | IEEE Electronic Library (IEL) |
| subjects | Analog circuits BiCMOS integrated circuits CMOS analog integrated circuits CMOS logic circuits CMOS process Differential amplifiers Frequency MOS devices Operational amplifiers Switching circuits |
| title | A high-frequency fully differential BiCMOS operational amplifier |
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