A Low-Voltage SRAM Sense Amplifier With Offset Cancelling Using Digitized Multiple Body Biasing

With continued CMOS technology scaling down, transistors exhibit higher degrees of variation and mismatch, resulting in a larger offset voltage. A large offset voltage will enlarge bitline swing, increasing dynamic power consumption during a read operation and degrading the sensing decision correct...

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Veröffentlicht in:	IEEE transactions on circuits and systems. II, Express briefs Express briefs, 2017-04, Vol.64 (4), p.442-446
Hauptverfasser:	Liu, Bingyan, Cai, Jiangzheng, Yuan, Jia, Hei, Yong
Format:	Artikel
Sprache:	eng
Schlagworte:	Body biasing Calibration latch-type sense amplifier (SA) Latches Layout offset cancelling Radiation detectors Random access memory static random access memory (SRAM) Threshold voltage threshold voltage mismatch Transistors
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