Low-Power Bootstrapped Rail-to-Rail Logic Gates for Thin-Film Applications
This paper presents low-power rail-to-rail output inverter and logic gates with only n-channel transistors. The proposed circuits with two capacitive-coupled stages and feedback are capable of reducing the direct path current substantially, essentially for antenna powered and mobile applications, wh...
Gespeichert in:
| Veröffentlicht in: | Journal of display technology 2016-12, Vol.12 (12), p.1539-1546 |
|---|---|
| Hauptverfasser: | , , , , |
| Format: | Artikel |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 1546 |
|---|---|
| container_issue | 12 |
| container_start_page | 1539 |
| container_title | Journal of display technology |
| container_volume | 12 |
| creator | Papadopoulos, Nikolas P. Czang-Ho Lee Tari, Alireza Wong, William S. Sachdev, Manoj |
| description | This paper presents low-power rail-to-rail output inverter and logic gates with only n-channel transistors. The proposed circuits with two capacitive-coupled stages and feedback are capable of reducing the direct path current substantially, essentially for antenna powered and mobile applications, while ensuring the full swing output. The presented simulation and measurement results are based on modeling and experimental characterization of low-temperature hydrogenated back-channel etched amorphous silicon thin-film transistors (a-Si:H TFT) and indium-gallium-zinc-oxide (IGZO) TFTs. The insensitivity of the design to the variation of the on-voltage of IGZO TFT technology is demonstrated. |
| doi_str_mv | 10.1109/JDT.2016.2561841 |
| format | Article |
| fullrecord | <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_ieee_primary_7464247</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>7464247</ieee_id><sourcerecordid>1859975067</sourcerecordid><originalsourceid>FETCH-LOGICAL-c291t-1edc34c7f355b59f5dd9dffca27004759be84b7de73ebabbb62c295c2f3e73bc3</originalsourceid><addsrcrecordid>eNo9kF1LwzAUhoMoOKf3gjcFr1Pz0TTN5ZxuOgqKTPAuJGmiGd1Sk47hv7dzw6v3cHjec-AB4BqjHGMk7hYPy5wgXOaElbgq8AkYYcYqKCihp38zhhSLj3NwkdIKIVqVVTkCizrs4GvY2Zjdh9CnPqqus032pnwL-wD3mdXh05tsrnqbMhditvzyGzjz7TqbdF3rjep92KRLcOZUm-zVMcfgffa4nD7B-mX-PJ3U0BCBe4htY2hhuKOMaSYcaxrROGcU4QgVnAltq0LzxnJqtdJal2QoMkMcHVba0DG4PdztYvje2tTLVdjGzfBS4ooJwRkq-UChA2ViSClaJ7vo1yr-SIzk3pgcjMm9MXk0NlRuDhVvrf3HeVEWpOD0F6DPZ2c</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>1859975067</pqid></control><display><type>article</type><title>Low-Power Bootstrapped Rail-to-Rail Logic Gates for Thin-Film Applications</title><source>IEEE Electronic Library (IEL)</source><creator>Papadopoulos, Nikolas P. ; Czang-Ho Lee ; Tari, Alireza ; Wong, William S. ; Sachdev, Manoj</creator><creatorcontrib>Papadopoulos, Nikolas P. ; Czang-Ho Lee ; Tari, Alireza ; Wong, William S. ; Sachdev, Manoj</creatorcontrib><description>This paper presents low-power rail-to-rail output inverter and logic gates with only n-channel transistors. The proposed circuits with two capacitive-coupled stages and feedback are capable of reducing the direct path current substantially, essentially for antenna powered and mobile applications, while ensuring the full swing output. The presented simulation and measurement results are based on modeling and experimental characterization of low-temperature hydrogenated back-channel etched amorphous silicon thin-film transistors (a-Si:H TFT) and indium-gallium-zinc-oxide (IGZO) TFTs. The insensitivity of the design to the variation of the on-voltage of IGZO TFT technology is demonstrated.</description><identifier>ISSN: 1551-319X</identifier><identifier>EISSN: 1558-9323</identifier><identifier>DOI: 10.1109/JDT.2016.2561841</identifier><identifier>CODEN: IJDTAL</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>a-si:H ; Amorphous silicon ; Applications programs ; bootstrapping ; Capacitance ; capacitor coupling ; charge injection ; Circuit synthesis ; feedback ; Indium gallium zinc oxide ; indium–gallium–zinc–oxide (IGZO) ; Integrated circuit modeling ; inverter ; Inverters ; Logic circuits ; Logic gates ; Low temperature ; low-power ; Mobile computing ; NAND ; NFC ; noise-margin ; NOR ; rail-to-rail ; Semiconductor devices ; Silicon films ; simulation ; small footprint ; Thin film transistors ; thin-film transistor (TFT) ; TMO ; Transistors</subject><ispartof>Journal of display technology, 2016-12, Vol.12 (12), p.1539-1546</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2016</rights><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c291t-1edc34c7f355b59f5dd9dffca27004759be84b7de73ebabbb62c295c2f3e73bc3</citedby><cites>FETCH-LOGICAL-c291t-1edc34c7f355b59f5dd9dffca27004759be84b7de73ebabbb62c295c2f3e73bc3</cites><orcidid>0000-0001-7584-6009</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/7464247$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,777,781,793,27905,27906,54739</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/7464247$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Papadopoulos, Nikolas P.</creatorcontrib><creatorcontrib>Czang-Ho Lee</creatorcontrib><creatorcontrib>Tari, Alireza</creatorcontrib><creatorcontrib>Wong, William S.</creatorcontrib><creatorcontrib>Sachdev, Manoj</creatorcontrib><title>Low-Power Bootstrapped Rail-to-Rail Logic Gates for Thin-Film Applications</title><title>Journal of display technology</title><addtitle>JDT</addtitle><description>This paper presents low-power rail-to-rail output inverter and logic gates with only n-channel transistors. The proposed circuits with two capacitive-coupled stages and feedback are capable of reducing the direct path current substantially, essentially for antenna powered and mobile applications, while ensuring the full swing output. The presented simulation and measurement results are based on modeling and experimental characterization of low-temperature hydrogenated back-channel etched amorphous silicon thin-film transistors (a-Si:H TFT) and indium-gallium-zinc-oxide (IGZO) TFTs. The insensitivity of the design to the variation of the on-voltage of IGZO TFT technology is demonstrated.</description><subject>a-si:H</subject><subject>Amorphous silicon</subject><subject>Applications programs</subject><subject>bootstrapping</subject><subject>Capacitance</subject><subject>capacitor coupling</subject><subject>charge injection</subject><subject>Circuit synthesis</subject><subject>feedback</subject><subject>Indium gallium zinc oxide</subject><subject>indium–gallium–zinc–oxide (IGZO)</subject><subject>Integrated circuit modeling</subject><subject>inverter</subject><subject>Inverters</subject><subject>Logic circuits</subject><subject>Logic gates</subject><subject>Low temperature</subject><subject>low-power</subject><subject>Mobile computing</subject><subject>NAND</subject><subject>NFC</subject><subject>noise-margin</subject><subject>NOR</subject><subject>rail-to-rail</subject><subject>Semiconductor devices</subject><subject>Silicon films</subject><subject>simulation</subject><subject>small footprint</subject><subject>Thin film transistors</subject><subject>thin-film transistor (TFT)</subject><subject>TMO</subject><subject>Transistors</subject><issn>1551-319X</issn><issn>1558-9323</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2016</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kF1LwzAUhoMoOKf3gjcFr1Pz0TTN5ZxuOgqKTPAuJGmiGd1Sk47hv7dzw6v3cHjec-AB4BqjHGMk7hYPy5wgXOaElbgq8AkYYcYqKCihp38zhhSLj3NwkdIKIVqVVTkCizrs4GvY2Zjdh9CnPqqus032pnwL-wD3mdXh05tsrnqbMhditvzyGzjz7TqbdF3rjep92KRLcOZUm-zVMcfgffa4nD7B-mX-PJ3U0BCBe4htY2hhuKOMaSYcaxrROGcU4QgVnAltq0LzxnJqtdJal2QoMkMcHVba0DG4PdztYvje2tTLVdjGzfBS4ooJwRkq-UChA2ViSClaJ7vo1yr-SIzk3pgcjMm9MXk0NlRuDhVvrf3HeVEWpOD0F6DPZ2c</recordid><startdate>201612</startdate><enddate>201612</enddate><creator>Papadopoulos, Nikolas P.</creator><creator>Czang-Ho Lee</creator><creator>Tari, Alireza</creator><creator>Wong, William S.</creator><creator>Sachdev, Manoj</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SC</scope><scope>7SP</scope><scope>8FD</scope><scope>JQ2</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope><orcidid>https://orcid.org/0000-0001-7584-6009</orcidid></search><sort><creationdate>201612</creationdate><title>Low-Power Bootstrapped Rail-to-Rail Logic Gates for Thin-Film Applications</title><author>Papadopoulos, Nikolas P. ; Czang-Ho Lee ; Tari, Alireza ; Wong, William S. ; Sachdev, Manoj</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c291t-1edc34c7f355b59f5dd9dffca27004759be84b7de73ebabbb62c295c2f3e73bc3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2016</creationdate><topic>a-si:H</topic><topic>Amorphous silicon</topic><topic>Applications programs</topic><topic>bootstrapping</topic><topic>Capacitance</topic><topic>capacitor coupling</topic><topic>charge injection</topic><topic>Circuit synthesis</topic><topic>feedback</topic><topic>Indium gallium zinc oxide</topic><topic>indium–gallium–zinc–oxide (IGZO)</topic><topic>Integrated circuit modeling</topic><topic>inverter</topic><topic>Inverters</topic><topic>Logic circuits</topic><topic>Logic gates</topic><topic>Low temperature</topic><topic>low-power</topic><topic>Mobile computing</topic><topic>NAND</topic><topic>NFC</topic><topic>noise-margin</topic><topic>NOR</topic><topic>rail-to-rail</topic><topic>Semiconductor devices</topic><topic>Silicon films</topic><topic>simulation</topic><topic>small footprint</topic><topic>Thin film transistors</topic><topic>thin-film transistor (TFT)</topic><topic>TMO</topic><topic>Transistors</topic><toplevel>online_resources</toplevel><creatorcontrib>Papadopoulos, Nikolas P.</creatorcontrib><creatorcontrib>Czang-Ho Lee</creatorcontrib><creatorcontrib>Tari, Alireza</creatorcontrib><creatorcontrib>Wong, William S.</creatorcontrib><creatorcontrib>Sachdev, Manoj</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Computer and Information Systems Abstracts</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><jtitle>Journal of display technology</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Papadopoulos, Nikolas P.</au><au>Czang-Ho Lee</au><au>Tari, Alireza</au><au>Wong, William S.</au><au>Sachdev, Manoj</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Low-Power Bootstrapped Rail-to-Rail Logic Gates for Thin-Film Applications</atitle><jtitle>Journal of display technology</jtitle><stitle>JDT</stitle><date>2016-12</date><risdate>2016</risdate><volume>12</volume><issue>12</issue><spage>1539</spage><epage>1546</epage><pages>1539-1546</pages><issn>1551-319X</issn><eissn>1558-9323</eissn><coden>IJDTAL</coden><abstract>This paper presents low-power rail-to-rail output inverter and logic gates with only n-channel transistors. The proposed circuits with two capacitive-coupled stages and feedback are capable of reducing the direct path current substantially, essentially for antenna powered and mobile applications, while ensuring the full swing output. The presented simulation and measurement results are based on modeling and experimental characterization of low-temperature hydrogenated back-channel etched amorphous silicon thin-film transistors (a-Si:H TFT) and indium-gallium-zinc-oxide (IGZO) TFTs. The insensitivity of the design to the variation of the on-voltage of IGZO TFT technology is demonstrated.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/JDT.2016.2561841</doi><tpages>8</tpages><orcidid>https://orcid.org/0000-0001-7584-6009</orcidid></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISSN: 1551-319X |
| ispartof | Journal of display technology, 2016-12, Vol.12 (12), p.1539-1546 |
| issn | 1551-319X 1558-9323 |
| language | eng |
| recordid | cdi_ieee_primary_7464247 |
| source | IEEE Electronic Library (IEL) |
| subjects | a-si:H Amorphous silicon Applications programs bootstrapping Capacitance capacitor coupling charge injection Circuit synthesis feedback Indium gallium zinc oxide indium–gallium–zinc–oxide (IGZO) Integrated circuit modeling inverter Inverters Logic circuits Logic gates Low temperature low-power Mobile computing NAND NFC noise-margin NOR rail-to-rail Semiconductor devices Silicon films simulation small footprint Thin film transistors thin-film transistor (TFT) TMO Transistors |
| title | Low-Power Bootstrapped Rail-to-Rail Logic Gates for Thin-Film Applications |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-18T16%3A19%3A44IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Low-Power%20Bootstrapped%20Rail-to-Rail%20Logic%20Gates%20for%20Thin-Film%20Applications&rft.jtitle=Journal%20of%20display%20technology&rft.au=Papadopoulos,%20Nikolas%20P.&rft.date=2016-12&rft.volume=12&rft.issue=12&rft.spage=1539&rft.epage=1546&rft.pages=1539-1546&rft.issn=1551-319X&rft.eissn=1558-9323&rft.coden=IJDTAL&rft_id=info:doi/10.1109/JDT.2016.2561841&rft_dat=%3Cproquest_RIE%3E1859975067%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=1859975067&rft_id=info:pmid/&rft_ieee_id=7464247&rfr_iscdi=true |