Efficient Statistical Parameter Selection for Nonlinear Modeling of Process/Performance Variation
With the growing number of process variation (PV) sources in deeply nano-scaled technologies, parameterized device and circuit modeling is becoming very important for chip design and verification. However, the high dimensionality of parameter space, for PV analysis, is a serious modeling challenge f...
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Veröffentlicht in: | IEEE transactions on computer-aided design of integrated circuits and systems 2016-12, Vol.35 (12), p.1995-2007 |
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container_issue | 12 |
container_start_page | 1995 |
container_title | IEEE transactions on computer-aided design of integrated circuits and systems |
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creator | Ghasemzadeh Mohammadi, Hassan Gaillardon, Pierre-Emmanuel De Micheli, Giovanni |
description | With the growing number of process variation (PV) sources in deeply nano-scaled technologies, parameterized device and circuit modeling is becoming very important for chip design and verification. However, the high dimensionality of parameter space, for PV analysis, is a serious modeling challenge for emerging VLSI technologies. These parameters correspond to various interdie and intradie variations, and considerably increase the difficulties of design validation. Today's response surface models and most commonly used parameter reduction methods, such as principal component analysis and independent component analysis, limit parameter reduction to linear or quadratic form and they do not address the higher order of nonlinearity among process and performance parameters. In this paper, we propose and validate a feature selection method to reduce the circuit modeling complexity associated with high parameter dimensionality. This method relies on a learning-based nonlinear sparse regression, and performs a parameter selection in the input space rather than creating a new space. This method is capable of dealing with mixed Gaussian and non-Gaussian parameters and results in a more precise parameter selection considering statistical nonlinear dependencies among input and output parameters. The application of this method is demonstrated in digital circuit timing analysis in both FinFET and Silicon Nanowire technologies. The results confirm the efficiency of this method to significantly reduce the number of required simulations while keeping estimation error small. |
doi_str_mv | 10.1109/TCAD.2016.2547908 |
format | Article |
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However, the high dimensionality of parameter space, for PV analysis, is a serious modeling challenge for emerging VLSI technologies. These parameters correspond to various interdie and intradie variations, and considerably increase the difficulties of design validation. Today's response surface models and most commonly used parameter reduction methods, such as principal component analysis and independent component analysis, limit parameter reduction to linear or quadratic form and they do not address the higher order of nonlinearity among process and performance parameters. In this paper, we propose and validate a feature selection method to reduce the circuit modeling complexity associated with high parameter dimensionality. This method relies on a learning-based nonlinear sparse regression, and performs a parameter selection in the input space rather than creating a new space. This method is capable of dealing with mixed Gaussian and non-Gaussian parameters and results in a more precise parameter selection considering statistical nonlinear dependencies among input and output parameters. The application of this method is demonstrated in digital circuit timing analysis in both FinFET and Silicon Nanowire technologies. The results confirm the efficiency of this method to significantly reduce the number of required simulations while keeping estimation error small.</description><identifier>ISSN: 0278-0070</identifier><identifier>EISSN: 1937-4151</identifier><identifier>DOI: 10.1109/TCAD.2016.2547908</identifier><identifier>CODEN: ITCSDI</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Analytical models ; Biological system modeling ; Circuit design ; Circuit modeling and simulation ; Computational modeling ; Computer simulation ; Correlation ; Digital electronics ; Independent component analysis ; Integrated circuit modeling ; Integrated circuits ; Mathematical models ; Modelling ; Nanowires ; Nonlinearity ; parameter reduction ; Principal component analysis ; Principal components analysis ; Process parameters ; process variation (PV) ; Quadratic forms ; Reduction ; Regression analysis ; Response surface methodology ; Statistical analysis ; Timing</subject><ispartof>IEEE transactions on computer-aided design of integrated circuits and systems, 2016-12, Vol.35 (12), p.1995-2007</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2016</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c293t-c6d8653c3b79ca2086fe5ce125dc6410c80aab8d3a6cee155eece84c3d0502453</citedby><cites>FETCH-LOGICAL-c293t-c6d8653c3b79ca2086fe5ce125dc6410c80aab8d3a6cee155eece84c3d0502453</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/7442830$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/7442830$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Ghasemzadeh Mohammadi, Hassan</creatorcontrib><creatorcontrib>Gaillardon, Pierre-Emmanuel</creatorcontrib><creatorcontrib>De Micheli, Giovanni</creatorcontrib><title>Efficient Statistical Parameter Selection for Nonlinear Modeling of Process/Performance Variation</title><title>IEEE transactions on computer-aided design of integrated circuits and systems</title><addtitle>TCAD</addtitle><description>With the growing number of process variation (PV) sources in deeply nano-scaled technologies, parameterized device and circuit modeling is becoming very important for chip design and verification. However, the high dimensionality of parameter space, for PV analysis, is a serious modeling challenge for emerging VLSI technologies. These parameters correspond to various interdie and intradie variations, and considerably increase the difficulties of design validation. Today's response surface models and most commonly used parameter reduction methods, such as principal component analysis and independent component analysis, limit parameter reduction to linear or quadratic form and they do not address the higher order of nonlinearity among process and performance parameters. In this paper, we propose and validate a feature selection method to reduce the circuit modeling complexity associated with high parameter dimensionality. This method relies on a learning-based nonlinear sparse regression, and performs a parameter selection in the input space rather than creating a new space. This method is capable of dealing with mixed Gaussian and non-Gaussian parameters and results in a more precise parameter selection considering statistical nonlinear dependencies among input and output parameters. The application of this method is demonstrated in digital circuit timing analysis in both FinFET and Silicon Nanowire technologies. The results confirm the efficiency of this method to significantly reduce the number of required simulations while keeping estimation error small.</description><subject>Analytical models</subject><subject>Biological system modeling</subject><subject>Circuit design</subject><subject>Circuit modeling and simulation</subject><subject>Computational modeling</subject><subject>Computer simulation</subject><subject>Correlation</subject><subject>Digital electronics</subject><subject>Independent component analysis</subject><subject>Integrated circuit modeling</subject><subject>Integrated circuits</subject><subject>Mathematical models</subject><subject>Modelling</subject><subject>Nanowires</subject><subject>Nonlinearity</subject><subject>parameter reduction</subject><subject>Principal component analysis</subject><subject>Principal components analysis</subject><subject>Process parameters</subject><subject>process variation (PV)</subject><subject>Quadratic forms</subject><subject>Reduction</subject><subject>Regression analysis</subject><subject>Response surface methodology</subject><subject>Statistical analysis</subject><subject>Timing</subject><issn>0278-0070</issn><issn>1937-4151</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2016</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kE1LAzEQQIMoWKs_QLwEPG87-drNHkutH1C10Op1SbOzkrLd1CQ9-O_dpeJp5vDeDDxCbhlMGINyupnPHiYcWD7hShYl6DMyYqUoMskUOycj4IXOAAq4JFcx7gCYVLwcEbNoGmcddomuk0kuJmdNS1cmmD0mDHSNLdrkfEcbH-ib71rXoQn01dfYr1_UN3QVvMUYpysMPbQ3nUX6aYIzg3dNLhrTRrz5m2Py8bjYzJ-z5fvTy3y2zCwvRcpsXutcCSu2RWkNB503qCwyrmqbSwZWgzFbXQuTW0SmFKJFLa2oQQGXSozJ_enuIfjvI8ZU7fwxdP3LimnJueYF8J5iJ8oGH2PApjoEtzfhp2JQDSWroWQ1lKz-SvbO3clxiPjPF1JyLUD8AlyacIs</recordid><startdate>20161201</startdate><enddate>20161201</enddate><creator>Ghasemzadeh Mohammadi, Hassan</creator><creator>Gaillardon, Pierre-Emmanuel</creator><creator>De Micheli, Giovanni</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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However, the high dimensionality of parameter space, for PV analysis, is a serious modeling challenge for emerging VLSI technologies. These parameters correspond to various interdie and intradie variations, and considerably increase the difficulties of design validation. Today's response surface models and most commonly used parameter reduction methods, such as principal component analysis and independent component analysis, limit parameter reduction to linear or quadratic form and they do not address the higher order of nonlinearity among process and performance parameters. In this paper, we propose and validate a feature selection method to reduce the circuit modeling complexity associated with high parameter dimensionality. This method relies on a learning-based nonlinear sparse regression, and performs a parameter selection in the input space rather than creating a new space. This method is capable of dealing with mixed Gaussian and non-Gaussian parameters and results in a more precise parameter selection considering statistical nonlinear dependencies among input and output parameters. The application of this method is demonstrated in digital circuit timing analysis in both FinFET and Silicon Nanowire technologies. The results confirm the efficiency of this method to significantly reduce the number of required simulations while keeping estimation error small.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TCAD.2016.2547908</doi><tpages>13</tpages></addata></record> |
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subjects | Analytical models Biological system modeling Circuit design Circuit modeling and simulation Computational modeling Computer simulation Correlation Digital electronics Independent component analysis Integrated circuit modeling Integrated circuits Mathematical models Modelling Nanowires Nonlinearity parameter reduction Principal component analysis Principal components analysis Process parameters process variation (PV) Quadratic forms Reduction Regression analysis Response surface methodology Statistical analysis Timing |
title | Efficient Statistical Parameter Selection for Nonlinear Modeling of Process/Performance Variation |
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