Automated synthesis of large phase shifters for built-in self-test
The paper introduces a new algorithm for the automated synthesis of phase shifters-circuits used to remove effects of structural dependencies featured by two-dimensional test generators. The algorithms presented in the paper synthesize in a time-efficient manner very large and fast phase shifters fo...
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creator | Rajski, J. Tamarapalli, N. Tyszer, J. |
description | The paper introduces a new algorithm for the automated synthesis of phase shifters-circuits used to remove effects of structural dependencies featured by two-dimensional test generators. The algorithms presented in the paper synthesize in a time-efficient manner very large and fast phase shifters for built in self-test environment, with guaranteed minimal phase shifts between scan chains, and very low delay and area of virtually one 2-way XOR gate per channel. |
doi_str_mv | 10.1109/TEST.1998.743303 |
format | Conference Proceeding |
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No.98CH36270)</title><addtitle>TEST</addtitle><description>The paper introduces a new algorithm for the automated synthesis of phase shifters-circuits used to remove effects of structural dependencies featured by two-dimensional test generators. The algorithms presented in the paper synthesize in a time-efficient manner very large and fast phase shifters for built in self-test environment, with guaranteed minimal phase shifts between scan chains, and very low delay and area of virtually one 2-way XOR gate per channel.</description><subject>Automatic testing</subject><subject>Built-in self-test</subject><subject>Circuit faults</subject><subject>Circuit synthesis</subject><subject>Circuit testing</subject><subject>Delay</subject><subject>Flip-flops</subject><subject>Graphics</subject><subject>Hardware</subject><subject>Phase shifters</subject><issn>1089-3539</issn><issn>2378-2250</issn><isbn>9780780350939</isbn><isbn>0780350936</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>1998</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotj01LAzEURYMfYK3di6v8gYwveUmTLGtpVSi4sK5LTF9sZNopk3TRf-9Ahcs9d3XgMvYooZES_PN68blupPeusRoR8IqNFFonlDJwzSbeOhiCBjz6GzaS4LxAg_6O3ZfyC6DAKBixl9mpdvtQacvL-VB3VHLhXeJt6H-IH3ehEC-7nCr1haeu59-n3FaRD7xQm0SlUh_YbQptock_x-xruVjP38Tq4_V9PluJLK2qAh0pSim4bdBGhmFoP7Uy6qCGmsYYcLoFq3SMyaAlmbRPKnpDQasoAcfs6eLNRLQ59nkf-vPm8h7_AIPtTG0</recordid><startdate>1998</startdate><enddate>1998</enddate><creator>Rajski, J.</creator><creator>Tamarapalli, N.</creator><creator>Tyszer, J.</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>1998</creationdate><title>Automated synthesis of large phase shifters for built-in self-test</title><author>Rajski, J. ; Tamarapalli, N. ; Tyszer, J.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i172t-38e2effa8da451afa849671c4a21c46cca36d0724ccf537e1f49f2c95ea42c103</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>1998</creationdate><topic>Automatic testing</topic><topic>Built-in self-test</topic><topic>Circuit faults</topic><topic>Circuit synthesis</topic><topic>Circuit testing</topic><topic>Delay</topic><topic>Flip-flops</topic><topic>Graphics</topic><topic>Hardware</topic><topic>Phase shifters</topic><toplevel>online_resources</toplevel><creatorcontrib>Rajski, J.</creatorcontrib><creatorcontrib>Tamarapalli, N.</creatorcontrib><creatorcontrib>Tyszer, J.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Xplore</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Rajski, J.</au><au>Tamarapalli, N.</au><au>Tyszer, J.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Automated synthesis of large phase shifters for built-in self-test</atitle><btitle>Proceedings International Test Conference 1998 (IEEE Cat. No.98CH36270)</btitle><stitle>TEST</stitle><date>1998</date><risdate>1998</risdate><spage>1047</spage><epage>1056</epage><pages>1047-1056</pages><issn>1089-3539</issn><eissn>2378-2250</eissn><isbn>9780780350939</isbn><isbn>0780350936</isbn><abstract>The paper introduces a new algorithm for the automated synthesis of phase shifters-circuits used to remove effects of structural dependencies featured by two-dimensional test generators. The algorithms presented in the paper synthesize in a time-efficient manner very large and fast phase shifters for built in self-test environment, with guaranteed minimal phase shifts between scan chains, and very low delay and area of virtually one 2-way XOR gate per channel.</abstract><pub>IEEE</pub><doi>10.1109/TEST.1998.743303</doi><tpages>10</tpages></addata></record> |
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ispartof | Proceedings International Test Conference 1998 (IEEE Cat. No.98CH36270), 1998, p.1047-1056 |
issn | 1089-3539 2378-2250 |
language | eng |
recordid | cdi_ieee_primary_743303 |
source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Automatic testing Built-in self-test Circuit faults Circuit synthesis Circuit testing Delay Flip-flops Graphics Hardware Phase shifters |
title | Automated synthesis of large phase shifters for built-in self-test |
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