A matrix synthesis approach to thermal placement
In this paper, we consider the thermal placement problem for gate arrays. We introduce a new combinatorial optimization problem, matrix synthesis problem (MSP), to model the thermal placement problem. Given a list of mn nonnegative real numbers and an integer t, MSP constructs a m/spl times/n matrix...
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Veröffentlicht in: | IEEE transactions on computer-aided design of integrated circuits and systems 1998-11, Vol.17 (11), p.1166-1174 |
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description | In this paper, we consider the thermal placement problem for gate arrays. We introduce a new combinatorial optimization problem, matrix synthesis problem (MSP), to model the thermal placement problem. Given a list of mn nonnegative real numbers and an integer t, MSP constructs a m/spl times/n matrix out of the given numbers such that the maximum sum among all t/spl times/t submatrices is minimized. We show that MSP is NP-complete and present several provably good approximation algorithms for the problem. We also demonstrate that our thermal placement strategy is flexible enough to allow simultaneous consideration of other objectives such as wiring. |
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fullrecord | <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_ieee_primary_736189</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>736189</ieee_id><sourcerecordid>26666242</sourcerecordid><originalsourceid>FETCH-LOGICAL-c456t-42105602af3a2573b7eb4abe92434487e7cee26949d1950abeaff02d986e74f93</originalsourceid><addsrcrecordid>eNpFkLtLA0EQhxdRMEYLW6srRLC4OPu6vS1D8AUBG62XyWaOnNzL3QuY_96VCzrNwPy--RiGsWsOC87BPii5MLLgpT1hM26lyRXX_JTNQJgyBzBwzi5i_ATgSgs7Y7DMWhxD_Z3FQzfuKNYxw2EIPfpdNvZZGoUWm2xo0FNL3XjJzipsIl0d-5x9PD2-r17y9dvz62q5zr3SxZgrwUEXILCSKLSRG0MbhRuyQkmlSkPGE4nCKrvlVkNKsKpAbG1ZkFGVlXN2N3nTLV97iqNr6-ipabCjfh-dKFIJJRJ4P4E-9DEGqtwQ6hbDwXFwvz9xSrrpJ4m9PUoxemyqgJ2v4_9CElqpE3YzYTUR_aVHxw-9uGd5</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>26666242</pqid></control><display><type>article</type><title>A matrix synthesis approach to thermal placement</title><source>IEEE Electronic Library (IEL)</source><creator>Chu, C.C.N. ; Wong, D.F.</creator><creatorcontrib>Chu, C.C.N. ; Wong, D.F.</creatorcontrib><description>In this paper, we consider the thermal placement problem for gate arrays. We introduce a new combinatorial optimization problem, matrix synthesis problem (MSP), to model the thermal placement problem. Given a list of mn nonnegative real numbers and an integer t, MSP constructs a m/spl times/n matrix out of the given numbers such that the maximum sum among all t/spl times/t submatrices is minimized. We show that MSP is NP-complete and present several provably good approximation algorithms for the problem. We also demonstrate that our thermal placement strategy is flexible enough to allow simultaneous consideration of other objectives such as wiring.</description><identifier>ISSN: 0278-0070</identifier><identifier>EISSN: 1937-4151</identifier><identifier>DOI: 10.1109/43.736189</identifier><identifier>CODEN: ITCSDI</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Applied sciences ; Approximation algorithms ; Bandwidth ; Circuits ; Clocks ; Design. Technologies. Operation analysis. Testing ; Electronics ; Energy consumption ; Exact sciences and technology ; Frequency ; Integrated circuits ; Packaging ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; Transmission line matrix methods ; Very large scale integration ; Wiring</subject><ispartof>IEEE transactions on computer-aided design of integrated circuits and systems, 1998-11, Vol.17 (11), p.1166-1174</ispartof><rights>1999 INIST-CNRS</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c456t-42105602af3a2573b7eb4abe92434487e7cee26949d1950abeaff02d986e74f93</citedby><cites>FETCH-LOGICAL-c456t-42105602af3a2573b7eb4abe92434487e7cee26949d1950abeaff02d986e74f93</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/736189$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/736189$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=1624935$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>Chu, C.C.N.</creatorcontrib><creatorcontrib>Wong, D.F.</creatorcontrib><title>A matrix synthesis approach to thermal placement</title><title>IEEE transactions on computer-aided design of integrated circuits and systems</title><addtitle>TCAD</addtitle><description>In this paper, we consider the thermal placement problem for gate arrays. We introduce a new combinatorial optimization problem, matrix synthesis problem (MSP), to model the thermal placement problem. Given a list of mn nonnegative real numbers and an integer t, MSP constructs a m/spl times/n matrix out of the given numbers such that the maximum sum among all t/spl times/t submatrices is minimized. We show that MSP is NP-complete and present several provably good approximation algorithms for the problem. We also demonstrate that our thermal placement strategy is flexible enough to allow simultaneous consideration of other objectives such as wiring.</description><subject>Applied sciences</subject><subject>Approximation algorithms</subject><subject>Bandwidth</subject><subject>Circuits</subject><subject>Clocks</subject><subject>Design. Technologies. Operation analysis. Testing</subject><subject>Electronics</subject><subject>Energy consumption</subject><subject>Exact sciences and technology</subject><subject>Frequency</subject><subject>Integrated circuits</subject><subject>Packaging</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Transmission line matrix methods</subject><subject>Very large scale integration</subject><subject>Wiring</subject><issn>0278-0070</issn><issn>1937-4151</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1998</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpFkLtLA0EQhxdRMEYLW6srRLC4OPu6vS1D8AUBG62XyWaOnNzL3QuY_96VCzrNwPy--RiGsWsOC87BPii5MLLgpT1hM26lyRXX_JTNQJgyBzBwzi5i_ATgSgs7Y7DMWhxD_Z3FQzfuKNYxw2EIPfpdNvZZGoUWm2xo0FNL3XjJzipsIl0d-5x9PD2-r17y9dvz62q5zr3SxZgrwUEXILCSKLSRG0MbhRuyQkmlSkPGE4nCKrvlVkNKsKpAbG1ZkFGVlXN2N3nTLV97iqNr6-ipabCjfh-dKFIJJRJ4P4E-9DEGqtwQ6hbDwXFwvz9xSrrpJ4m9PUoxemyqgJ2v4_9CElqpE3YzYTUR_aVHxw-9uGd5</recordid><startdate>19981101</startdate><enddate>19981101</enddate><creator>Chu, C.C.N.</creator><creator>Wong, D.F.</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><scope>RIA</scope><scope>RIE</scope><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>7U5</scope><scope>8FD</scope><scope>L7M</scope></search><sort><creationdate>19981101</creationdate><title>A matrix synthesis approach to thermal placement</title><author>Chu, C.C.N. ; Wong, D.F.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c456t-42105602af3a2573b7eb4abe92434487e7cee26949d1950abeaff02d986e74f93</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1998</creationdate><topic>Applied sciences</topic><topic>Approximation algorithms</topic><topic>Bandwidth</topic><topic>Circuits</topic><topic>Clocks</topic><topic>Design. Technologies. Operation analysis. Testing</topic><topic>Electronics</topic><topic>Energy consumption</topic><topic>Exact sciences and technology</topic><topic>Frequency</topic><topic>Integrated circuits</topic><topic>Packaging</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Transmission line matrix methods</topic><topic>Very large scale integration</topic><topic>Wiring</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Chu, C.C.N.</creatorcontrib><creatorcontrib>Wong, D.F.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Solid State and Superconductivity Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE transactions on computer-aided design of integrated circuits and systems</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Chu, C.C.N.</au><au>Wong, D.F.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A matrix synthesis approach to thermal placement</atitle><jtitle>IEEE transactions on computer-aided design of integrated circuits and systems</jtitle><stitle>TCAD</stitle><date>1998-11-01</date><risdate>1998</risdate><volume>17</volume><issue>11</issue><spage>1166</spage><epage>1174</epage><pages>1166-1174</pages><issn>0278-0070</issn><eissn>1937-4151</eissn><coden>ITCSDI</coden><abstract>In this paper, we consider the thermal placement problem for gate arrays. We introduce a new combinatorial optimization problem, matrix synthesis problem (MSP), to model the thermal placement problem. Given a list of mn nonnegative real numbers and an integer t, MSP constructs a m/spl times/n matrix out of the given numbers such that the maximum sum among all t/spl times/t submatrices is minimized. We show that MSP is NP-complete and present several provably good approximation algorithms for the problem. We also demonstrate that our thermal placement strategy is flexible enough to allow simultaneous consideration of other objectives such as wiring.</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/43.736189</doi><tpages>9</tpages><oa>free_for_read</oa></addata></record> |
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subjects | Applied sciences Approximation algorithms Bandwidth Circuits Clocks Design. Technologies. Operation analysis. Testing Electronics Energy consumption Exact sciences and technology Frequency Integrated circuits Packaging Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Transmission line matrix methods Very large scale integration Wiring |
title | A matrix synthesis approach to thermal placement |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-22T21%3A41%3A31IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=A%20matrix%20synthesis%20approach%20to%20thermal%20placement&rft.jtitle=IEEE%20transactions%20on%20computer-aided%20design%20of%20integrated%20circuits%20and%20systems&rft.au=Chu,%20C.C.N.&rft.date=1998-11-01&rft.volume=17&rft.issue=11&rft.spage=1166&rft.epage=1174&rft.pages=1166-1174&rft.issn=0278-0070&rft.eissn=1937-4151&rft.coden=ITCSDI&rft_id=info:doi/10.1109/43.736189&rft_dat=%3Cproquest_RIE%3E26666242%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=26666242&rft_id=info:pmid/&rft_ieee_id=736189&rfr_iscdi=true |