A Duplication-Aware SSD-Based Cache Architecture for Primary Storage in Virtualization Environment

With the advantages of low latency, high performance, and low power consumption, solid state drives (SSDs) have been widely deployed as the cache layer between memory and back-end low-speed storage devices to narrow the performance gap between CPU and storage system. However, in virtualization envir...

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Veröffentlicht in:IEEE systems journal 2017-12, Vol.11 (4), p.2578-2589
Hauptverfasser: Chen, Xian, Chen, Wenzhi, Lu, Zhongyong, Long, Peng, Yang, Shuiqiao, Wang, Zonghui
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container_issue 4
container_start_page 2578
container_title IEEE systems journal
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creator Chen, Xian
Chen, Wenzhi
Lu, Zhongyong
Long, Peng
Yang, Shuiqiao
Wang, Zonghui
description With the advantages of low latency, high performance, and low power consumption, solid state drives (SSDs) have been widely deployed as the cache layer between memory and back-end low-speed storage devices to narrow the performance gap between CPU and storage system. However, in virtualization environment, the high integration of virtual machines can introduce a lot of duplicate data blocks in the cache device. Existing cache architectures and replacement algorithms rarely take this situation into consideration. This greatly limits the efficient use of the cache device. For this case, we proposed a duplication-aware SSD-based cache architecture. In this architecture, duplicate data blocks can be significantly reduced, and the utilization efficiency of the cache device will be notably improved. Furthermore, to reduce the cache replacement overhead, we also proposed an improved adaptive replacement cache (ARC)-based replacement strategy, which we named D-ARC. Experiment results show that, in some situations, our cache architecture can improve the cache hit ratio by five times, reduce the average I/O latency by 63%, and eliminate SDD writes by 81%. Compared with the ARC-based replacement strategy, D-ARC can provide a performance improvement by about 16% if the configuration is set appropriately.
doi_str_mv 10.1109/JSYST.2015.2494377
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fullrecord <record><control><sourceid>crossref_RIE</sourceid><recordid>TN_cdi_ieee_primary_7327162</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>7327162</ieee_id><sourcerecordid>10_1109_JSYST_2015_2494377</sourcerecordid><originalsourceid>FETCH-LOGICAL-c267t-cf9d1ef7f434195407e7fde8407e0231fcc63e71ff20cbfcae0413d63f117d503</originalsourceid><addsrcrecordid>eNo9kNtKAzEURYMoWKs_oC_5gak5SWYyeRx78UJBYarg05BmTmyknSmZVNGvtzd8OhsOa7NZhFwDGwAwfftUvpezAWeQDrjUUih1QnqghUo0F_J0n3mSQy7PyUXXfTKW5qnSPTIv6GizXnprom-bpPg2AWlZjpI702FNh8YukBbBLnxEGzfbp2sDfQl-ZcIPLWMbzAdS39A3H-LGLP3vvoiOmy8f2maFTbwkZ84sO7w63j55nYxnw4dk-nz_OCymieWZiol1ugZ0ykkhQaeSKVSuxnwXGBfgrM0EKnCOMzt31iCTIOpMOABVp0z0CT_02tB2XUBXrQ8zK2DVzlK1t1TtLFVHS1vo5gB5RPwHlOAKMi7-APXxZV8</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype></control><display><type>article</type><title>A Duplication-Aware SSD-Based Cache Architecture for Primary Storage in Virtualization Environment</title><source>IEEE Electronic Library (IEL)</source><creator>Chen, Xian ; Chen, Wenzhi ; Lu, Zhongyong ; Long, Peng ; Yang, Shuiqiao ; Wang, Zonghui</creator><creatorcontrib>Chen, Xian ; Chen, Wenzhi ; Lu, Zhongyong ; Long, Peng ; Yang, Shuiqiao ; Wang, Zonghui</creatorcontrib><description>With the advantages of low latency, high performance, and low power consumption, solid state drives (SSDs) have been widely deployed as the cache layer between memory and back-end low-speed storage devices to narrow the performance gap between CPU and storage system. However, in virtualization environment, the high integration of virtual machines can introduce a lot of duplicate data blocks in the cache device. Existing cache architectures and replacement algorithms rarely take this situation into consideration. This greatly limits the efficient use of the cache device. For this case, we proposed a duplication-aware SSD-based cache architecture. In this architecture, duplicate data blocks can be significantly reduced, and the utilization efficiency of the cache device will be notably improved. Furthermore, to reduce the cache replacement overhead, we also proposed an improved adaptive replacement cache (ARC)-based replacement strategy, which we named D-ARC. Experiment results show that, in some situations, our cache architecture can improve the cache hit ratio by five times, reduce the average I/O latency by 63%, and eliminate SDD writes by 81%. Compared with the ARC-based replacement strategy, D-ARC can provide a performance improvement by about 16% if the configuration is set appropriately.</description><identifier>ISSN: 1932-8184</identifier><identifier>EISSN: 1937-9234</identifier><identifier>DOI: 10.1109/JSYST.2015.2494377</identifier><identifier>CODEN: ISJEB2</identifier><language>eng</language><publisher>IEEE</publisher><subject>Cache architecture ; Computer architecture ; data deduplication ; Performance evaluation ; replacement strategy ; solid state drive (SSD) ; Virtual machining ; Virtualization ; virtualization platform</subject><ispartof>IEEE systems journal, 2017-12, Vol.11 (4), p.2578-2589</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c267t-cf9d1ef7f434195407e7fde8407e0231fcc63e71ff20cbfcae0413d63f117d503</citedby><cites>FETCH-LOGICAL-c267t-cf9d1ef7f434195407e7fde8407e0231fcc63e71ff20cbfcae0413d63f117d503</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/7327162$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>315,781,785,797,27928,27929,54762</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/7327162$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Chen, Xian</creatorcontrib><creatorcontrib>Chen, Wenzhi</creatorcontrib><creatorcontrib>Lu, Zhongyong</creatorcontrib><creatorcontrib>Long, Peng</creatorcontrib><creatorcontrib>Yang, Shuiqiao</creatorcontrib><creatorcontrib>Wang, Zonghui</creatorcontrib><title>A Duplication-Aware SSD-Based Cache Architecture for Primary Storage in Virtualization Environment</title><title>IEEE systems journal</title><addtitle>JSYST</addtitle><description>With the advantages of low latency, high performance, and low power consumption, solid state drives (SSDs) have been widely deployed as the cache layer between memory and back-end low-speed storage devices to narrow the performance gap between CPU and storage system. However, in virtualization environment, the high integration of virtual machines can introduce a lot of duplicate data blocks in the cache device. Existing cache architectures and replacement algorithms rarely take this situation into consideration. This greatly limits the efficient use of the cache device. For this case, we proposed a duplication-aware SSD-based cache architecture. In this architecture, duplicate data blocks can be significantly reduced, and the utilization efficiency of the cache device will be notably improved. Furthermore, to reduce the cache replacement overhead, we also proposed an improved adaptive replacement cache (ARC)-based replacement strategy, which we named D-ARC. Experiment results show that, in some situations, our cache architecture can improve the cache hit ratio by five times, reduce the average I/O latency by 63%, and eliminate SDD writes by 81%. Compared with the ARC-based replacement strategy, D-ARC can provide a performance improvement by about 16% if the configuration is set appropriately.</description><subject>Cache architecture</subject><subject>Computer architecture</subject><subject>data deduplication</subject><subject>Performance evaluation</subject><subject>replacement strategy</subject><subject>solid state drive (SSD)</subject><subject>Virtual machining</subject><subject>Virtualization</subject><subject>virtualization platform</subject><issn>1932-8184</issn><issn>1937-9234</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2017</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kNtKAzEURYMoWKs_oC_5gak5SWYyeRx78UJBYarg05BmTmyknSmZVNGvtzd8OhsOa7NZhFwDGwAwfftUvpezAWeQDrjUUih1QnqghUo0F_J0n3mSQy7PyUXXfTKW5qnSPTIv6GizXnprom-bpPg2AWlZjpI702FNh8YukBbBLnxEGzfbp2sDfQl-ZcIPLWMbzAdS39A3H-LGLP3vvoiOmy8f2maFTbwkZ84sO7w63j55nYxnw4dk-nz_OCymieWZiol1ugZ0ykkhQaeSKVSuxnwXGBfgrM0EKnCOMzt31iCTIOpMOABVp0z0CT_02tB2XUBXrQ8zK2DVzlK1t1TtLFVHS1vo5gB5RPwHlOAKMi7-APXxZV8</recordid><startdate>20171201</startdate><enddate>20171201</enddate><creator>Chen, Xian</creator><creator>Chen, Wenzhi</creator><creator>Lu, Zhongyong</creator><creator>Long, Peng</creator><creator>Yang, Shuiqiao</creator><creator>Wang, Zonghui</creator><general>IEEE</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>20171201</creationdate><title>A Duplication-Aware SSD-Based Cache Architecture for Primary Storage in Virtualization Environment</title><author>Chen, Xian ; Chen, Wenzhi ; Lu, Zhongyong ; Long, Peng ; Yang, Shuiqiao ; Wang, Zonghui</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c267t-cf9d1ef7f434195407e7fde8407e0231fcc63e71ff20cbfcae0413d63f117d503</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2017</creationdate><topic>Cache architecture</topic><topic>Computer architecture</topic><topic>data deduplication</topic><topic>Performance evaluation</topic><topic>replacement strategy</topic><topic>solid state drive (SSD)</topic><topic>Virtual machining</topic><topic>Virtualization</topic><topic>virtualization platform</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Chen, Xian</creatorcontrib><creatorcontrib>Chen, Wenzhi</creatorcontrib><creatorcontrib>Lu, Zhongyong</creatorcontrib><creatorcontrib>Long, Peng</creatorcontrib><creatorcontrib>Yang, Shuiqiao</creatorcontrib><creatorcontrib>Wang, Zonghui</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998–Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><jtitle>IEEE systems journal</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Chen, Xian</au><au>Chen, Wenzhi</au><au>Lu, Zhongyong</au><au>Long, Peng</au><au>Yang, Shuiqiao</au><au>Wang, Zonghui</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A Duplication-Aware SSD-Based Cache Architecture for Primary Storage in Virtualization Environment</atitle><jtitle>IEEE systems journal</jtitle><stitle>JSYST</stitle><date>2017-12-01</date><risdate>2017</risdate><volume>11</volume><issue>4</issue><spage>2578</spage><epage>2589</epage><pages>2578-2589</pages><issn>1932-8184</issn><eissn>1937-9234</eissn><coden>ISJEB2</coden><abstract>With the advantages of low latency, high performance, and low power consumption, solid state drives (SSDs) have been widely deployed as the cache layer between memory and back-end low-speed storage devices to narrow the performance gap between CPU and storage system. However, in virtualization environment, the high integration of virtual machines can introduce a lot of duplicate data blocks in the cache device. Existing cache architectures and replacement algorithms rarely take this situation into consideration. This greatly limits the efficient use of the cache device. For this case, we proposed a duplication-aware SSD-based cache architecture. In this architecture, duplicate data blocks can be significantly reduced, and the utilization efficiency of the cache device will be notably improved. Furthermore, to reduce the cache replacement overhead, we also proposed an improved adaptive replacement cache (ARC)-based replacement strategy, which we named D-ARC. Experiment results show that, in some situations, our cache architecture can improve the cache hit ratio by five times, reduce the average I/O latency by 63%, and eliminate SDD writes by 81%. Compared with the ARC-based replacement strategy, D-ARC can provide a performance improvement by about 16% if the configuration is set appropriately.</abstract><pub>IEEE</pub><doi>10.1109/JSYST.2015.2494377</doi><tpages>12</tpages></addata></record>
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subjects Cache architecture
Computer architecture
data deduplication
Performance evaluation
replacement strategy
solid state drive (SSD)
Virtual machining
Virtualization
virtualization platform
title A Duplication-Aware SSD-Based Cache Architecture for Primary Storage in Virtualization Environment
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-17T11%3A05%3A20IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-crossref_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=A%20Duplication-Aware%20SSD-Based%20Cache%20Architecture%20for%20Primary%20Storage%20in%20Virtualization%20Environment&rft.jtitle=IEEE%20systems%20journal&rft.au=Chen,%20Xian&rft.date=2017-12-01&rft.volume=11&rft.issue=4&rft.spage=2578&rft.epage=2589&rft.pages=2578-2589&rft.issn=1932-8184&rft.eissn=1937-9234&rft.coden=ISJEB2&rft_id=info:doi/10.1109/JSYST.2015.2494377&rft_dat=%3Ccrossref_RIE%3E10_1109_JSYST_2015_2494377%3C/crossref_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=7327162&rfr_iscdi=true