Realization of a mixed-mode neural coprocessor for signal processing

Realization of a mixed-mode neural coprocessor for signal processing

A hybrid architecture for neural coprocessing is presented. A fixed set of analog multipliers and capacitors (analog memory) emulates multilayer perceptrons through digitally-controlled multiplexing. Parallelism is partially preserved, then, without direct analog implementation of the whole structur...

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Bibliographische Detailangaben
Hauptverfasser: Romariz, A.R.S., Ferreira, P.U.A., Campelo, J.V., Graciano, M.L., Maia, O.R., da Costa, J.C.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Analog memory
Capacitors
Concurrent computing
Coprocessors
Multilayer perceptrons
Neural networks
Neurons
Parallel processing
Pipelines
Signal processing
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Zusammenfassung:A hybrid architecture for neural coprocessing is presented. A fixed set of analog multipliers and capacitors (analog memory) emulates multilayer perceptrons through digitally-controlled multiplexing. Parallelism is partially preserved, then, without direct analog implementation of the whole structure. Details of system VLSI implementation are given, along with simulation results that validate system cells design.
DOI:10.1109/SBRN.1998.731023