A Block Truncation Coding Algorithm and Hardware Implementation Targeting 1/12 Compression for LCD Overdrive
Block truncation coding (BTC) is commonly used to compress a video to be stored in frame memory for display devices such as LCDs. The original BTC algorithm partitions an input image into 4 ×4 blocks and compresses each block to reduce the data size down to 1/4 of the original size of the data. As t...
Gespeichert in:
Veröffentlicht in: | Journal of display technology 2016-04, Vol.12 (4), p.376-389 |
---|---|
Hauptverfasser: | , , , |
Format: | Artikel |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | 389 |
---|---|
container_issue | 4 |
container_start_page | 376 |
container_title | Journal of display technology |
container_volume | 12 |
creator | Kim, Sunwoong Lee, Donghyeon Kim, Jin-Sung Lee, Hyuk-Jae |
description | Block truncation coding (BTC) is commonly used to compress a video to be stored in frame memory for display devices such as LCDs. The original BTC algorithm partitions an input image into 4 ×4 blocks and compresses each block to reduce the data size down to 1/4 of the original size of the data. As the size of a video displayed on an LCD increases, the frame memory size also increases. Therefore, it is necessary to reduce the frame memory size further. The previous BTC suffers from a severe quality degradation when its compression ratio exceeds 6 to the original data. This paper proposes a novel BTC-based compression algorithm of which the target compression ratio is 12. To improve the compression efficiency, the proposed algorithm adopts a bit-saving scheme that utilizes the spatial correlation between vertically adjacent blocks. Furthermore, the blocks with low image complexity are coded using one 2 × 16 coding block while those with high image complexity are coded using two 2 × 8 coding blocks. With the hardware implementation for a high throughput constraint, the memory sizes of the encoder and decoder are 21,312 bits and 5952 bits, respectively, whereas the gate counts of the encoder and decoder are 68.7 K and 13.6 K, respectively. Experimental results show that the average PSNR of the proposed algorithm is 30.03 dB and that the throughputs of the encoder and decoder are 27.5 Gbps and 63.9 Gbps at operating frequencies of 143 and 333 MHz, respectively. |
doi_str_mv | 10.1109/JDT.2015.2493163 |
format | Article |
fullrecord | <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_ieee_primary_7302518</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>7302518</ieee_id><sourcerecordid>1815984743</sourcerecordid><originalsourceid>FETCH-LOGICAL-c324t-c852096d161f7b1b162f1347fd20e39f097bb586fefb2aba9dcd43f856b3e4b3</originalsourceid><addsrcrecordid>eNpdkD1PwzAQhiMEEuVjR2KxxMKS1mcnjj2W8lVUiSUDm-Uk55KSxMVOQfx7EooYmO6V7nlPpyeKLoBOAaiaPd3mU0YhnbJEcRD8IJpAmspYccYPfzLEHNTLcXQSwoZSLoUUk6iZk5vGlW8k97uuNH3tOrJwVd2tybxZO1_3ry0xXUUeja8-jUeybLcNttj1ezg3fo39yMMM2NBttx5DGFfWebJa3JLnD_SVrz_wLDqypgl4_jtPo_z-Ll88xqvnh-VivopLzpI-LmXKqBIVCLBZAQUIZoEnma0YRa4sVVlRpFJYtAUzhVFVWSXcylQUHJOCn0bX-7Nb7953GHrd1qHEpjEdul3QICFVMskSPqBX_9CN2_lueE5DJoXKMgkjRfdU6V0IHq3e-ro1_ksD1aN9PdjXo339a3-oXO4rNSL-4RmnLAXJvwH59IAP</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>1786977813</pqid></control><display><type>article</type><title>A Block Truncation Coding Algorithm and Hardware Implementation Targeting 1/12 Compression for LCD Overdrive</title><source>IEEE Electronic Library (IEL)</source><creator>Kim, Sunwoong ; Lee, Donghyeon ; Kim, Jin-Sung ; Lee, Hyuk-Jae</creator><creatorcontrib>Kim, Sunwoong ; Lee, Donghyeon ; Kim, Jin-Sung ; Lee, Hyuk-Jae</creatorcontrib><description>Block truncation coding (BTC) is commonly used to compress a video to be stored in frame memory for display devices such as LCDs. The original BTC algorithm partitions an input image into 4 ×4 blocks and compresses each block to reduce the data size down to 1/4 of the original size of the data. As the size of a video displayed on an LCD increases, the frame memory size also increases. Therefore, it is necessary to reduce the frame memory size further. The previous BTC suffers from a severe quality degradation when its compression ratio exceeds 6 to the original data. This paper proposes a novel BTC-based compression algorithm of which the target compression ratio is 12. To improve the compression efficiency, the proposed algorithm adopts a bit-saving scheme that utilizes the spatial correlation between vertically adjacent blocks. Furthermore, the blocks with low image complexity are coded using one 2 × 16 coding block while those with high image complexity are coded using two 2 × 8 coding blocks. With the hardware implementation for a high throughput constraint, the memory sizes of the encoder and decoder are 21,312 bits and 5952 bits, respectively, whereas the gate counts of the encoder and decoder are 68.7 K and 13.6 K, respectively. Experimental results show that the average PSNR of the proposed algorithm is 30.03 dB and that the throughputs of the encoder and decoder are 27.5 Gbps and 63.9 Gbps at operating frequencies of 143 and 333 MHz, respectively.</description><identifier>ISSN: 1551-319X</identifier><identifier>EISSN: 1558-9323</identifier><identifier>DOI: 10.1109/JDT.2015.2493163</identifier><identifier>CODEN: IJDTAL</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Algorithm design and analysis ; Algorithms ; Block truncation coding (BTC) ; Blocking ; Coders ; Coding ; color image compression ; Decoders ; Decoding ; Digital broadcasting ; Encoders ; Encoding ; Frames ; Hardware ; Image coding ; Image color analysis ; Image quality ; liquid crystal display (LCD) ; overdrive technique ; VLSI implementation</subject><ispartof>Journal of display technology, 2016-04, Vol.12 (4), p.376-389</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2016</rights><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c324t-c852096d161f7b1b162f1347fd20e39f097bb586fefb2aba9dcd43f856b3e4b3</citedby><cites>FETCH-LOGICAL-c324t-c852096d161f7b1b162f1347fd20e39f097bb586fefb2aba9dcd43f856b3e4b3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/7302518$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27915,27916,54749</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/7302518$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Kim, Sunwoong</creatorcontrib><creatorcontrib>Lee, Donghyeon</creatorcontrib><creatorcontrib>Kim, Jin-Sung</creatorcontrib><creatorcontrib>Lee, Hyuk-Jae</creatorcontrib><title>A Block Truncation Coding Algorithm and Hardware Implementation Targeting 1/12 Compression for LCD Overdrive</title><title>Journal of display technology</title><addtitle>JDT</addtitle><description>Block truncation coding (BTC) is commonly used to compress a video to be stored in frame memory for display devices such as LCDs. The original BTC algorithm partitions an input image into 4 ×4 blocks and compresses each block to reduce the data size down to 1/4 of the original size of the data. As the size of a video displayed on an LCD increases, the frame memory size also increases. Therefore, it is necessary to reduce the frame memory size further. The previous BTC suffers from a severe quality degradation when its compression ratio exceeds 6 to the original data. This paper proposes a novel BTC-based compression algorithm of which the target compression ratio is 12. To improve the compression efficiency, the proposed algorithm adopts a bit-saving scheme that utilizes the spatial correlation between vertically adjacent blocks. Furthermore, the blocks with low image complexity are coded using one 2 × 16 coding block while those with high image complexity are coded using two 2 × 8 coding blocks. With the hardware implementation for a high throughput constraint, the memory sizes of the encoder and decoder are 21,312 bits and 5952 bits, respectively, whereas the gate counts of the encoder and decoder are 68.7 K and 13.6 K, respectively. Experimental results show that the average PSNR of the proposed algorithm is 30.03 dB and that the throughputs of the encoder and decoder are 27.5 Gbps and 63.9 Gbps at operating frequencies of 143 and 333 MHz, respectively.</description><subject>Algorithm design and analysis</subject><subject>Algorithms</subject><subject>Block truncation coding (BTC)</subject><subject>Blocking</subject><subject>Coders</subject><subject>Coding</subject><subject>color image compression</subject><subject>Decoders</subject><subject>Decoding</subject><subject>Digital broadcasting</subject><subject>Encoders</subject><subject>Encoding</subject><subject>Frames</subject><subject>Hardware</subject><subject>Image coding</subject><subject>Image color analysis</subject><subject>Image quality</subject><subject>liquid crystal display (LCD)</subject><subject>overdrive technique</subject><subject>VLSI implementation</subject><issn>1551-319X</issn><issn>1558-9323</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2016</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpdkD1PwzAQhiMEEuVjR2KxxMKS1mcnjj2W8lVUiSUDm-Uk55KSxMVOQfx7EooYmO6V7nlPpyeKLoBOAaiaPd3mU0YhnbJEcRD8IJpAmspYccYPfzLEHNTLcXQSwoZSLoUUk6iZk5vGlW8k97uuNH3tOrJwVd2tybxZO1_3ry0xXUUeja8-jUeybLcNttj1ezg3fo39yMMM2NBttx5DGFfWebJa3JLnD_SVrz_wLDqypgl4_jtPo_z-Ll88xqvnh-VivopLzpI-LmXKqBIVCLBZAQUIZoEnma0YRa4sVVlRpFJYtAUzhVFVWSXcylQUHJOCn0bX-7Nb7953GHrd1qHEpjEdul3QICFVMskSPqBX_9CN2_lueE5DJoXKMgkjRfdU6V0IHq3e-ro1_ksD1aN9PdjXo339a3-oXO4rNSL-4RmnLAXJvwH59IAP</recordid><startdate>201604</startdate><enddate>201604</enddate><creator>Kim, Sunwoong</creator><creator>Lee, Donghyeon</creator><creator>Kim, Jin-Sung</creator><creator>Lee, Hyuk-Jae</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SC</scope><scope>7SP</scope><scope>8FD</scope><scope>JQ2</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope><scope>F28</scope><scope>FR3</scope></search><sort><creationdate>201604</creationdate><title>A Block Truncation Coding Algorithm and Hardware Implementation Targeting 1/12 Compression for LCD Overdrive</title><author>Kim, Sunwoong ; Lee, Donghyeon ; Kim, Jin-Sung ; Lee, Hyuk-Jae</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c324t-c852096d161f7b1b162f1347fd20e39f097bb586fefb2aba9dcd43f856b3e4b3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2016</creationdate><topic>Algorithm design and analysis</topic><topic>Algorithms</topic><topic>Block truncation coding (BTC)</topic><topic>Blocking</topic><topic>Coders</topic><topic>Coding</topic><topic>color image compression</topic><topic>Decoders</topic><topic>Decoding</topic><topic>Digital broadcasting</topic><topic>Encoders</topic><topic>Encoding</topic><topic>Frames</topic><topic>Hardware</topic><topic>Image coding</topic><topic>Image color analysis</topic><topic>Image quality</topic><topic>liquid crystal display (LCD)</topic><topic>overdrive technique</topic><topic>VLSI implementation</topic><toplevel>online_resources</toplevel><creatorcontrib>Kim, Sunwoong</creatorcontrib><creatorcontrib>Lee, Donghyeon</creatorcontrib><creatorcontrib>Kim, Jin-Sung</creatorcontrib><creatorcontrib>Lee, Hyuk-Jae</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Computer and Information Systems Abstracts</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><jtitle>Journal of display technology</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Kim, Sunwoong</au><au>Lee, Donghyeon</au><au>Kim, Jin-Sung</au><au>Lee, Hyuk-Jae</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A Block Truncation Coding Algorithm and Hardware Implementation Targeting 1/12 Compression for LCD Overdrive</atitle><jtitle>Journal of display technology</jtitle><stitle>JDT</stitle><date>2016-04</date><risdate>2016</risdate><volume>12</volume><issue>4</issue><spage>376</spage><epage>389</epage><pages>376-389</pages><issn>1551-319X</issn><eissn>1558-9323</eissn><coden>IJDTAL</coden><abstract>Block truncation coding (BTC) is commonly used to compress a video to be stored in frame memory for display devices such as LCDs. The original BTC algorithm partitions an input image into 4 ×4 blocks and compresses each block to reduce the data size down to 1/4 of the original size of the data. As the size of a video displayed on an LCD increases, the frame memory size also increases. Therefore, it is necessary to reduce the frame memory size further. The previous BTC suffers from a severe quality degradation when its compression ratio exceeds 6 to the original data. This paper proposes a novel BTC-based compression algorithm of which the target compression ratio is 12. To improve the compression efficiency, the proposed algorithm adopts a bit-saving scheme that utilizes the spatial correlation between vertically adjacent blocks. Furthermore, the blocks with low image complexity are coded using one 2 × 16 coding block while those with high image complexity are coded using two 2 × 8 coding blocks. With the hardware implementation for a high throughput constraint, the memory sizes of the encoder and decoder are 21,312 bits and 5952 bits, respectively, whereas the gate counts of the encoder and decoder are 68.7 K and 13.6 K, respectively. Experimental results show that the average PSNR of the proposed algorithm is 30.03 dB and that the throughputs of the encoder and decoder are 27.5 Gbps and 63.9 Gbps at operating frequencies of 143 and 333 MHz, respectively.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/JDT.2015.2493163</doi><tpages>14</tpages></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | ISSN: 1551-319X |
ispartof | Journal of display technology, 2016-04, Vol.12 (4), p.376-389 |
issn | 1551-319X 1558-9323 |
language | eng |
recordid | cdi_ieee_primary_7302518 |
source | IEEE Electronic Library (IEL) |
subjects | Algorithm design and analysis Algorithms Block truncation coding (BTC) Blocking Coders Coding color image compression Decoders Decoding Digital broadcasting Encoders Encoding Frames Hardware Image coding Image color analysis Image quality liquid crystal display (LCD) overdrive technique VLSI implementation |
title | A Block Truncation Coding Algorithm and Hardware Implementation Targeting 1/12 Compression for LCD Overdrive |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-15T05%3A16%3A06IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=A%20Block%20Truncation%20Coding%20Algorithm%20and%20Hardware%20Implementation%20Targeting%201/12%20Compression%20for%20LCD%20Overdrive&rft.jtitle=Journal%20of%20display%20technology&rft.au=Kim,%20Sunwoong&rft.date=2016-04&rft.volume=12&rft.issue=4&rft.spage=376&rft.epage=389&rft.pages=376-389&rft.issn=1551-319X&rft.eissn=1558-9323&rft.coden=IJDTAL&rft_id=info:doi/10.1109/JDT.2015.2493163&rft_dat=%3Cproquest_RIE%3E1815984743%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=1786977813&rft_id=info:pmid/&rft_ieee_id=7302518&rfr_iscdi=true |