A Block Truncation Coding Algorithm and Hardware Implementation Targeting 1/12 Compression for LCD Overdrive

Block truncation coding (BTC) is commonly used to compress a video to be stored in frame memory for display devices such as LCDs. The original BTC algorithm partitions an input image into 4 ×4 blocks and compresses each block to reduce the data size down to 1/4 of the original size of the data. As t...

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Veröffentlicht in:Journal of display technology 2016-04, Vol.12 (4), p.376-389
Hauptverfasser: Kim, Sunwoong, Lee, Donghyeon, Kim, Jin-Sung, Lee, Hyuk-Jae
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Lee, Donghyeon
Kim, Jin-Sung
Lee, Hyuk-Jae
description Block truncation coding (BTC) is commonly used to compress a video to be stored in frame memory for display devices such as LCDs. The original BTC algorithm partitions an input image into 4 ×4 blocks and compresses each block to reduce the data size down to 1/4 of the original size of the data. As the size of a video displayed on an LCD increases, the frame memory size also increases. Therefore, it is necessary to reduce the frame memory size further. The previous BTC suffers from a severe quality degradation when its compression ratio exceeds 6 to the original data. This paper proposes a novel BTC-based compression algorithm of which the target compression ratio is 12. To improve the compression efficiency, the proposed algorithm adopts a bit-saving scheme that utilizes the spatial correlation between vertically adjacent blocks. Furthermore, the blocks with low image complexity are coded using one 2 × 16 coding block while those with high image complexity are coded using two 2 × 8 coding blocks. With the hardware implementation for a high throughput constraint, the memory sizes of the encoder and decoder are 21,312 bits and 5952 bits, respectively, whereas the gate counts of the encoder and decoder are 68.7 K and 13.6 K, respectively. Experimental results show that the average PSNR of the proposed algorithm is 30.03 dB and that the throughputs of the encoder and decoder are 27.5 Gbps and 63.9 Gbps at operating frequencies of 143 and 333 MHz, respectively.
doi_str_mv 10.1109/JDT.2015.2493163
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subjects Algorithm design and analysis
Algorithms
Block truncation coding (BTC)
Blocking
Coders
Coding
color image compression
Decoders
Decoding
Digital broadcasting
Encoders
Encoding
Frames
Hardware
Image coding
Image color analysis
Image quality
liquid crystal display (LCD)
overdrive technique
VLSI implementation
title A Block Truncation Coding Algorithm and Hardware Implementation Targeting 1/12 Compression for LCD Overdrive
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