Single-chip implementation of a 32-bit microcontroller for motor drive
A single-chip 32-bit microcontroller was designed for a motor drive; the architecture and the implementation issues such as the clock distribution and the chip test results including the power dissipation are presented in this paper. The microcontroller includes the SPARC processor a FPU, a memory c...
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| creator | Kim, J.C. Lee, S.H. Lee, D.Y. Lee, J.H. Jeong, W.C. Park, H.J. Mok, I.S. |
| description | A single-chip 32-bit microcontroller was designed for a motor drive; the architecture and the implementation issues such as the clock distribution and the chip test results including the power dissipation are presented in this paper. The microcontroller includes the SPARC processor a FPU, a memory controller, an interrupt controller and peripheral devices in a single-chip. The microcontroller was optimized for vector controlled motor drives demanding high performance number crunching capabilities. The microcontroller chip was fabricated using a 0.8 /spl mu/m DLM N-well. CMOS technology. The chip contained about 562,000 transistors, the chip size was 12.8 mm/spl times/12.7 mm and the power consumption was 1.69 W at the supply voltage of 5 V and the clock frequency of 30 MHz. |
| doi_str_mv | 10.1109/ASIC.1998.722783 |
| format | Conference Proceeding |
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The microcontroller includes the SPARC processor a FPU, a memory controller, an interrupt controller and peripheral devices in a single-chip. The microcontroller was optimized for vector controlled motor drives demanding high performance number crunching capabilities. The microcontroller chip was fabricated using a 0.8 /spl mu/m DLM N-well. CMOS technology. The chip contained about 562,000 transistors, the chip size was 12.8 mm/spl times/12.7 mm and the power consumption was 1.69 W at the supply voltage of 5 V and the clock frequency of 30 MHz.</description><identifier>ISSN: 1063-0988</identifier><identifier>ISBN: 0780349806</identifier><identifier>ISBN: 9780780349803</identifier><identifier>EISSN: 2164-1773</identifier><identifier>DOI: 10.1109/ASIC.1998.722783</identifier><language>eng</language><publisher>IEEE</publisher><subject>Clocks ; CMOS technology ; Energy consumption ; Frequency ; Microcontrollers ; Micromotors ; Motor drives ; Power dissipation ; Testing ; Voltage</subject><ispartof>Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. 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The chip contained about 562,000 transistors, the chip size was 12.8 mm/spl times/12.7 mm and the power consumption was 1.69 W at the supply voltage of 5 V and the clock frequency of 30 MHz.</description><subject>Clocks</subject><subject>CMOS technology</subject><subject>Energy consumption</subject><subject>Frequency</subject><subject>Microcontrollers</subject><subject>Micromotors</subject><subject>Motor drives</subject><subject>Power dissipation</subject><subject>Testing</subject><subject>Voltage</subject><issn>1063-0988</issn><issn>2164-1773</issn><isbn>0780349806</isbn><isbn>9780780349803</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>1998</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotj0tLAzEURoMPsK3uxVX-QOq9uZk8lqX4KBRcVNclk2Q0MjMp6SD47y3UzXd2h_Mxdo-wRAT3uNpt1kt0zi6NlMbSBZtJ1EqgMXTJ5mAskHIW9BWbIWgS4Ky9YfPj8RtAgrQ4Y8-7PH72SYSvfOB5OPRpSOPkp1xGXjruOUnR5okPOdQSyjjV0vep8q5UPpTptLHmn3TLrjvfH9PdPxfs4_npff0qtm8vm_VqKzIaOYl4qm2RMCrd-oY66DQ1wUeCJlhL2gVQwcXgPTUtxtBigkZ1RkHU0QRFC_Zw9uaU0v5Q8-Dr7_58n_4Au6xMqQ</recordid><startdate>1998</startdate><enddate>1998</enddate><creator>Kim, J.C.</creator><creator>Lee, S.H.</creator><creator>Lee, D.Y.</creator><creator>Lee, J.H.</creator><creator>Jeong, W.C.</creator><creator>Park, H.J.</creator><creator>Mok, I.S.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>1998</creationdate><title>Single-chip implementation of a 32-bit microcontroller for motor drive</title><author>Kim, J.C. ; Lee, S.H. ; Lee, D.Y. ; Lee, J.H. ; Jeong, W.C. ; Park, H.J. ; Mok, I.S.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i172t-d199b131d46ba53f0f635cad305c88369c04c9dcaa35b1dcb1e054f740d6d7c43</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>1998</creationdate><topic>Clocks</topic><topic>CMOS technology</topic><topic>Energy consumption</topic><topic>Frequency</topic><topic>Microcontrollers</topic><topic>Micromotors</topic><topic>Motor drives</topic><topic>Power dissipation</topic><topic>Testing</topic><topic>Voltage</topic><toplevel>online_resources</toplevel><creatorcontrib>Kim, J.C.</creatorcontrib><creatorcontrib>Lee, S.H.</creatorcontrib><creatorcontrib>Lee, D.Y.</creatorcontrib><creatorcontrib>Lee, J.H.</creatorcontrib><creatorcontrib>Jeong, W.C.</creatorcontrib><creatorcontrib>Park, H.J.</creatorcontrib><creatorcontrib>Mok, I.S.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Kim, J.C.</au><au>Lee, S.H.</au><au>Lee, D.Y.</au><au>Lee, J.H.</au><au>Jeong, W.C.</au><au>Park, H.J.</au><au>Mok, I.S.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Single-chip implementation of a 32-bit microcontroller for motor drive</atitle><btitle>Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372)</btitle><stitle>ASIC</stitle><date>1998</date><risdate>1998</risdate><spage>3</spage><epage>6</epage><pages>3-6</pages><issn>1063-0988</issn><eissn>2164-1773</eissn><isbn>0780349806</isbn><isbn>9780780349803</isbn><abstract>A single-chip 32-bit microcontroller was designed for a motor drive; the architecture and the implementation issues such as the clock distribution and the chip test results including the power dissipation are presented in this paper. The microcontroller includes the SPARC processor a FPU, a memory controller, an interrupt controller and peripheral devices in a single-chip. The microcontroller was optimized for vector controlled motor drives demanding high performance number crunching capabilities. The microcontroller chip was fabricated using a 0.8 /spl mu/m DLM N-well. CMOS technology. The chip contained about 562,000 transistors, the chip size was 12.8 mm/spl times/12.7 mm and the power consumption was 1.69 W at the supply voltage of 5 V and the clock frequency of 30 MHz.</abstract><pub>IEEE</pub><doi>10.1109/ASIC.1998.722783</doi><tpages>4</tpages></addata></record> |
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| identifier | ISSN: 1063-0988 |
| ispartof | Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372), 1998, p.3-6 |
| issn | 1063-0988 2164-1773 |
| language | eng |
| recordid | cdi_ieee_primary_722783 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Clocks CMOS technology Energy consumption Frequency Microcontrollers Micromotors Motor drives Power dissipation Testing Voltage |
| title | Single-chip implementation of a 32-bit microcontroller for motor drive |
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