Design-Time Reliability Enhancement Using Hotspot Identification for RF Circuits
Failure due to aging mechanisms in CMOS devices is an important concern of RF circuits. Lifetime of analog/RF circuits is defined as the point where at least one specification will fail due to aging effects. In this brief, we present a methodology for analyzing the performance degradation of RF circ...
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| Veröffentlicht in: | IEEE transactions on very large scale integration (VLSI) systems 2016-03, Vol.24 (3), p.1179-1183 |
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| container_title | IEEE transactions on very large scale integration (VLSI) systems |
| container_volume | 24 |
| creator | Doohwang Chang Kitchen, Jennifer N. Bakkaloglu, Bertan Kiaei, Sayfe Ozev, Sule |
| description | Failure due to aging mechanisms in CMOS devices is an important concern of RF circuits. Lifetime of analog/RF circuits is defined as the point where at least one specification will fail due to aging effects. In this brief, we present a methodology for analyzing the performance degradation of RF circuits caused by aging mechanisms in MOSFET devices and inductors at design time (presilicon). We identify reliability hotspots and concentrate on these circuit components to enhance the lifetime with low area and no performance impact. |
| doi_str_mv | 10.1109/TVLSI.2015.2428221 |
| format | Article |
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We identify reliability hotspots and concentrate on these circuit components to enhance the lifetime with low area and no performance impact.</description><subject>Aging</subject><subject>Aging (artificial)</subject><subject>Circuit design</subject><subject>Circuit reliability</subject><subject>Circuits</subject><subject>Degradation</subject><subject>Devices</subject><subject>Electromigration (EM)</subject><subject>Failure</subject><subject>Hot spots</subject><subject>hot-carrier injection (HCI)</subject><subject>hotspot identification</subject><subject>Human computer interaction</subject><subject>lifetime enhancement</subject><subject>negative bias temperature instability (NBTI)</subject><subject>Oscillators</subject><subject>Reliability</subject><subject>RF reliability</subject><subject>Stress</subject><subject>Transistors</subject><subject>Very large scale integration</subject><issn>1063-8210</issn><issn>1557-9999</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2016</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpdkE1PwzAMhisEEmPwB-BSiQuXjjhNmvSIxsYmTQKNjWuUZs7I1I_RpIf9ezqGOOCLLet5LeuJolsgIwCSP64-Fu_zESXAR5RRSSmcRQPgXCR5X-f9TLI0kRTIZXTl_Y4QYCwng-jtGb3b1snKVRgvsXS6cKULh3hSf-raYIV1iNfe1dt41gS_b0I83_Q7Z53RwTV1bJs2Xk7jsWtN54K_ji6sLj3e_PZhtJ5OVuNZsnh9mY-fFolJqQyJyLgockIYpVpKYzcUU9SMMMYKbQlaLVATQwRFlkvNJN8UUnAhQVObmiIdRg-nu_u2-erQB1U5b7AsdY1N5xVIyAjNcp736P0_dNd0bd1_p0BIQTMmIOspeqJM23jfolX71lW6PSgg6ihZ_UhWR8nqV3IfujuFHCL-BQQAh0ym34y-d_c</recordid><startdate>201603</startdate><enddate>201603</enddate><creator>Doohwang Chang</creator><creator>Kitchen, Jennifer N.</creator><creator>Bakkaloglu, Bertan</creator><creator>Kiaei, Sayfe</creator><creator>Ozev, Sule</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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| ispartof | IEEE transactions on very large scale integration (VLSI) systems, 2016-03, Vol.24 (3), p.1179-1183 |
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| language | eng |
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| source | IEEE Electronic Library (IEL) |
| subjects | Aging Aging (artificial) Circuit design Circuit reliability Circuits Degradation Devices Electromigration (EM) Failure Hot spots hot-carrier injection (HCI) hotspot identification Human computer interaction lifetime enhancement negative bias temperature instability (NBTI) Oscillators Reliability RF reliability Stress Transistors Very large scale integration |
| title | Design-Time Reliability Enhancement Using Hotspot Identification for RF Circuits |
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