Interconnect and circuit modeling techniques for full-chip power supply noise analysis

This paper describes the interconnect and circuit modeling techniques to analyze the on-chip power supply noise for high-performance very large scale integration (VLSI) design. To reduce the complexity of full-chip analysis, a hierarchical power supply distribution model, which consists of a 12/spl...

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Veröffentlicht in:	IEEE transactions on components, packaging, and manufacturing technology. Part B, Advanced packaging packaging, and manufacturing technology. Part B, Advanced packaging, 1998-08, Vol.21 (3), p.209-215
Hauptverfasser:	Chen, H.H., Neely, J.S.
Format:	Artikel
Sprache:	eng
Schlagworte:	Acoustic reflection Applied sciences Circuit noise Crosstalk Distributed parameter circuits Electronics Exact sciences and technology Impedance Integrated circuit interconnections Power supplies Power transmission lines Switching circuits Testing, measurement, noise and reliability Threshold voltage
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