Design and Low-Complexity Implementation of Matrix-Vector Multiplier for Iterative Methods in Communication Systems

Iterative methods are basic building blocks of communication systems and often represent a dominating part of the system, and therefore, they necessitate careful design and implementation for optimal performance. In this brief, we propose a novel field programmable gate arrays design of matrix-vecto...

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Veröffentlicht in:	IEEE transactions on very large scale integration (VLSI) systems 2015-12, Vol.23 (12), p.3099-3103
Hauptverfasser:	Alshawi, Tariq, Bentrcia, Abdelouahab, Alshebeili, Saleh
Format:	Artikel
Sprache:	eng
Schlagworte:	Adders Delays Field programmable gate array (FPGA) Field programmable gate arrays Hardware Iterative methods Multiaccess communication multiple access nonmonotone line search parallel interference cancellation real time Sparse matrices
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