Deterministic Crash Recovery for NAND Flash Based Storage Systems
NAND flash memory has long been the dominant storage medium in mobile devices. However, power failure may occur at any time and result in loss of important data. Crash recovery therefore becomes vitally important in NAND flash memory storage systems. As flash translation layer (FTL) directly manages...
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| creator | Zhang, Chi Wang, Yi Wang, Tianzheng Chen, Renhai Liu, Duo Shao, Zili |
| description | NAND flash memory has long been the dominant storage medium in mobile devices. However, power failure may occur at any time and result in loss of important data. Crash recovery therefore becomes vitally important in NAND flash memory storage systems. As flash translation layer (FTL) directly manages flash memory using various metadata, the problem of FTL crash recovery in NAND flash is how to efficiently and effectively maintain and recover the consistency of FTL metadata after system crash.
In this paper, we present DCR, a deterministic approach to crash recovery for NAND flash based storage systems. The basic idea is to exploit the determinism of FTL and reproduce events that happened between the last checkpoint and the crash point during crash recovery. Different from existing approaches which have to scan the whole flash memory chip, we show that DCR can recover the system more efficiently by only checking a limited number of blocks based on deterministic FTL operations. We have implemented DCR for a block-level FTL and compared it with a popular version-based scheme using an ARM11-based embedded evaluation board. Experimental results show that DCR can greatly reduce recovery time and guarantee the consistency of FTL metadata after recovery. |
| doi_str_mv | 10.1145/2593069.2593124 |
| format | Conference Proceeding |
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In this paper, we present DCR, a deterministic approach to crash recovery for NAND flash based storage systems. The basic idea is to exploit the determinism of FTL and reproduce events that happened between the last checkpoint and the crash point during crash recovery. Different from existing approaches which have to scan the whole flash memory chip, we show that DCR can recover the system more efficiently by only checking a limited number of blocks based on deterministic FTL operations. We have implemented DCR for a block-level FTL and compared it with a popular version-based scheme using an ARM11-based embedded evaluation board. Experimental results show that DCR can greatly reduce recovery time and guarantee the consistency of FTL metadata after recovery.</description><identifier>ISSN: 0738-100X</identifier><identifier>ISBN: 1450327303</identifier><identifier>ISBN: 9781450327305</identifier><identifier>EISBN: 1479930172</identifier><identifier>EISBN: 9781479930173</identifier><identifier>DOI: 10.1145/2593069.2593124</identifier><language>eng</language><publisher>New York, NY, USA: ACM</publisher><subject>Ash ; Benchmark testing ; Computer crashes ; crash recovery ; Flash memories ; Hardware -- Hardware test ; Hardware -- Hardware test -- Memory test and repair ; NAND flash memory ; Random access memory ; reliability ; Resource management ; Software and its engineering -- Software organization and properties -- Contextual software domains -- Operating systems -- Memory management -- Secondary storage ; Virtual private networks</subject><ispartof>2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC), 2014, p.1-6</ispartof><rights>2014 ACM</rights><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6881475$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,776,780,785,786,792,23910,23911,25119,27904,54737</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6881475$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Zhang, Chi</creatorcontrib><creatorcontrib>Wang, Yi</creatorcontrib><creatorcontrib>Wang, Tianzheng</creatorcontrib><creatorcontrib>Chen, Renhai</creatorcontrib><creatorcontrib>Liu, Duo</creatorcontrib><creatorcontrib>Shao, Zili</creatorcontrib><title>Deterministic Crash Recovery for NAND Flash Based Storage Systems</title><title>2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC)</title><addtitle>DAC</addtitle><description>NAND flash memory has long been the dominant storage medium in mobile devices. However, power failure may occur at any time and result in loss of important data. Crash recovery therefore becomes vitally important in NAND flash memory storage systems. As flash translation layer (FTL) directly manages flash memory using various metadata, the problem of FTL crash recovery in NAND flash is how to efficiently and effectively maintain and recover the consistency of FTL metadata after system crash.
In this paper, we present DCR, a deterministic approach to crash recovery for NAND flash based storage systems. The basic idea is to exploit the determinism of FTL and reproduce events that happened between the last checkpoint and the crash point during crash recovery. Different from existing approaches which have to scan the whole flash memory chip, we show that DCR can recover the system more efficiently by only checking a limited number of blocks based on deterministic FTL operations. We have implemented DCR for a block-level FTL and compared it with a popular version-based scheme using an ARM11-based embedded evaluation board. Experimental results show that DCR can greatly reduce recovery time and guarantee the consistency of FTL metadata after recovery.</description><subject>Ash</subject><subject>Benchmark testing</subject><subject>Computer crashes</subject><subject>crash recovery</subject><subject>Flash memories</subject><subject>Hardware -- Hardware test</subject><subject>Hardware -- Hardware test -- Memory test and repair</subject><subject>NAND flash memory</subject><subject>Random access memory</subject><subject>reliability</subject><subject>Resource management</subject><subject>Software and its engineering -- Software organization and properties -- Contextual software domains -- Operating systems -- Memory management -- Secondary storage</subject><subject>Virtual private networks</subject><issn>0738-100X</issn><isbn>1450327303</isbn><isbn>9781450327305</isbn><isbn>1479930172</isbn><isbn>9781479930173</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2014</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNqNkL1Ow0AQhA8BEiGkpqBxSeOw6_vzlSEhgBQFiVDQnc6-NRhijO6sSHl7bCUPQDXamU-r3WHsGmGKKORdJg0HZaaDYiZO2CUKbXoPdXY6DBJ4pjnwMzYCzfMUAd4v2CTGLwBALrCnR2y2oI5CU__UsavLZB5c_ExeqWx3FPZJ1YZkPVsvkuV28O9dJJ9suja4D0o2-9hRE6_YeeW2kSZHHbPN8uFt_pSuXh6f57NV6jKhu7QEA9o4wkwpJOELj5QrByVUGvrLkSvKvPdSVqYUWipEZ4wovNG5VHzMbg5bayKyv6FuXNhblef917JPbw-pKxtbtO13tAh26Mkee7LHnnp0-k_UFqGmiv8BYWViKQ</recordid><startdate>20140601</startdate><enddate>20140601</enddate><creator>Zhang, Chi</creator><creator>Wang, Yi</creator><creator>Wang, Tianzheng</creator><creator>Chen, Renhai</creator><creator>Liu, Duo</creator><creator>Shao, Zili</creator><general>ACM</general><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>20140601</creationdate><title>Deterministic Crash Recovery for NAND Flash Based Storage Systems</title><author>Zhang, Chi ; Wang, Yi ; Wang, Tianzheng ; Chen, Renhai ; Liu, Duo ; Shao, Zili</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-a247t-c09079ae12661e4dbd1e86a0c0f70479136e2ddd55f9c475611a994bd978563</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2014</creationdate><topic>Ash</topic><topic>Benchmark testing</topic><topic>Computer crashes</topic><topic>crash recovery</topic><topic>Flash memories</topic><topic>Hardware -- Hardware test</topic><topic>Hardware -- Hardware test -- Memory test and repair</topic><topic>NAND flash memory</topic><topic>Random access memory</topic><topic>reliability</topic><topic>Resource management</topic><topic>Software and its engineering -- Software organization and properties -- Contextual software domains -- Operating systems -- Memory management -- Secondary storage</topic><topic>Virtual private networks</topic><toplevel>online_resources</toplevel><creatorcontrib>Zhang, Chi</creatorcontrib><creatorcontrib>Wang, Yi</creatorcontrib><creatorcontrib>Wang, Tianzheng</creatorcontrib><creatorcontrib>Chen, Renhai</creatorcontrib><creatorcontrib>Liu, Duo</creatorcontrib><creatorcontrib>Shao, Zili</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Zhang, Chi</au><au>Wang, Yi</au><au>Wang, Tianzheng</au><au>Chen, Renhai</au><au>Liu, Duo</au><au>Shao, Zili</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Deterministic Crash Recovery for NAND Flash Based Storage Systems</atitle><btitle>2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC)</btitle><stitle>DAC</stitle><date>2014-06-01</date><risdate>2014</risdate><spage>1</spage><epage>6</epage><pages>1-6</pages><issn>0738-100X</issn><isbn>1450327303</isbn><isbn>9781450327305</isbn><eisbn>1479930172</eisbn><eisbn>9781479930173</eisbn><abstract>NAND flash memory has long been the dominant storage medium in mobile devices. However, power failure may occur at any time and result in loss of important data. Crash recovery therefore becomes vitally important in NAND flash memory storage systems. As flash translation layer (FTL) directly manages flash memory using various metadata, the problem of FTL crash recovery in NAND flash is how to efficiently and effectively maintain and recover the consistency of FTL metadata after system crash.
In this paper, we present DCR, a deterministic approach to crash recovery for NAND flash based storage systems. The basic idea is to exploit the determinism of FTL and reproduce events that happened between the last checkpoint and the crash point during crash recovery. Different from existing approaches which have to scan the whole flash memory chip, we show that DCR can recover the system more efficiently by only checking a limited number of blocks based on deterministic FTL operations. We have implemented DCR for a block-level FTL and compared it with a popular version-based scheme using an ARM11-based embedded evaluation board. Experimental results show that DCR can greatly reduce recovery time and guarantee the consistency of FTL metadata after recovery.</abstract><cop>New York, NY, USA</cop><pub>ACM</pub><doi>10.1145/2593069.2593124</doi><tpages>6</tpages></addata></record> |
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| identifier | ISSN: 0738-100X |
| ispartof | 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC), 2014, p.1-6 |
| issn | 0738-100X |
| language | eng |
| recordid | cdi_ieee_primary_6881475 |
| source | IEEE Electronic Library (IEL) |
| subjects | Ash Benchmark testing Computer crashes crash recovery Flash memories Hardware -- Hardware test Hardware -- Hardware test -- Memory test and repair NAND flash memory Random access memory reliability Resource management Software and its engineering -- Software organization and properties -- Contextual software domains -- Operating systems -- Memory management -- Secondary storage Virtual private networks |
| title | Deterministic Crash Recovery for NAND Flash Based Storage Systems |
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