On the operational features and performance of a memristor-based cell for a LUT of an FPGA

This paper presents the detailed analysis of a memristor-based cell for a Look-Up Table (LUT) of a FPGA. The basic operational properties of this memristor-based cell are considered in depth. It shows that different from previous schemes, the ringing phenomenon of the so-called normalized state para...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Nandha Kumar, T., Almurib, H. A. F., Lombardi, F.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Assessments Conferences Field programmable gate arrays Integrity Memory devices Memristors MOS devices Nanotechnology Resistance Resistors Simulation Steady-state Table lookup Tables (data)
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