Design of a low-power digital processor for a security passive RFID tag

A digital processor in secure RFID tag is designed to support a cryptographic data communication between an interrogator and a tag. The AES OFB-like algorithm is used for a cryptographic data communication. The digital processor is fully compatible with the EPC C1 G2 protocol. The power consumption...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Taehun Ki, Hyunseok Kim, Chelho Chung, Young-Han Kim, Kyusung Bae, Jongbae Kim
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	A security RFID tag Advanced Encryption Standard (AES) Clocks Cryptography Engines Low power CMOS digital circuit Power demand Protocols Radiofrequency identification
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