Design of a capacitive DAC mismatch calibrator for split SAR ADC in 65 nm CMOS

This paper presents the design and implementation of a capacitive digital to analog converter (CDAC) mismatch calibrator used in split successive approximation resistor (SAR) analog to digital converter (ADC) in a 65 nm complementary metal oxide semiconductor (CMOS) process. The calibrator adopts a...

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Bibliographische Detailangaben

Hauptverfasser:	Anh Trong Huynh, Hoa Thai Duong, Hoang Viet Le, Skafidas, Efstratios
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Analog to digital converter Approximation methods Arrays Calibration Capacitance capacitor mismatch Capacitors complementary metal oxide semiconductor Distortion measurement Frequency measurement successive approximation register
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