Using LV process to design high voltage DDDMOSFET and LDMOSFET with 3-D profile structure

Using LV process to design high voltage DDDMOSFET and LDMOSFET with 3-D profile structure

In this work, layout skills using three dimensional (3D) fish bone, slot, and island patterns to enhance the breakdown voltage of PW/NW junction of lateral MOSFETs is developed. Novel lateral double diffused MOSFETs (LDMOSFET) and Double Diffused Drain MOSFETs (DDDMOSFET) without any high voltage (H...

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Hauptverfasser: Chien-Hao Huang, Tsung-Yi Huang, Ching-Yao Yang, Huang-Ping Chu, Kuo-Hsuan Lo, Chung-Yu Hung, Kuo-Cheng Chang, Hung-Der Su, Chih-Fang Huang, Jeng Gong
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Bones
CMOS integrated circuits
Doping
Implants
Layout
Logic gates
Marine animals
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Beschreibung
Zusammenfassung:In this work, layout skills using three dimensional (3D) fish bone, slot, and island patterns to enhance the breakdown voltage of PW/NW junction of lateral MOSFETs is developed. Novel lateral double diffused MOSFETs (LDMOSFET) and Double Diffused Drain MOSFETs (DDDMOSFET) without any high voltage (HV) layer are achieved in a standard 5V low voltage (LV) CMOS technology. From the experiment results, the developed DDDMOSFETs and LDMOSFETs can be used for 10V and 60V application respectively.
ISSN:1063-6854
1946-0201
DOI:10.1109/ISPSD.2013.6694463