An FPGA Software Defined Radio Platform with a High-Level Synthesis Design Flow

Software defined radio (SDR) opens a new door to future Internet of Things with higher degree of designing flexibility in context of wireless system development. Prototyping a remote implementation of wireless protocols on a hardware over the web requires a highly versatile software radio platform a...

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Hauptverfasser: Bhatnagar, Vaibhav, Ouedraogo, Ganda Stephane, Gautier, Matthieu, Carer, Arnaud, Sentieys, Olivier
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Ouedraogo, Ganda Stephane
Gautier, Matthieu
Carer, Arnaud
Sentieys, Olivier
description Software defined radio (SDR) opens a new door to future Internet of Things with higher degree of designing flexibility in context of wireless system development. Prototyping a remote implementation of wireless protocols on a hardware over the web requires a highly versatile software radio platform along with laid-back designing tools. To this aim, an FPGA-based SDR scheme has been proposed combining Virtex-6 Perseus 6010 platform capabilities and a design flow based on High-Level Synthesis (HLS) tools. A full IEEE 802.15.4 (ZigBee) physical layer has been implemented on the proposed platform from a C-language dataflow specification. All the results have been analyzed to lead to a fair comparison between different design flows. Although the proposed SDR has some designing issues, it shows a noticeable designing potentiality to flexible prototyping of future wireless systems.
doi_str_mv 10.1109/VTCSpring.2013.6691879
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subjects Delays
Field programmable gate arrays
Graphical user interfaces
Hardware
IEEE 802.15 Standards
Logic gates
Software
title An FPGA Software Defined Radio Platform with a High-Level Synthesis Design Flow
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