A 75-mW 128-MHz DS-CDMA baseband demodulator for high-speed wireless applications [LANs]

A DS-CDMA demodulator uses analog sampled-data signal processing to achieve a 75-mW power dissipation and a 128-MS/s processing rate in a 1.2-/spl mu/m double-metal double-poly CMOS process. To demodulate the signal, a low-power passive correlation technique is introduced that eliminates the integra...

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Veröffentlicht in:	IEEE journal of solid-state circuits 1998-05, Vol.33 (5), p.753-761
Hauptverfasser:	Onodera, K.K., Gray, P.R.
Format:	Artikel
Sprache:	eng
Schlagworte:	Baseband CMOS process Correlators Demodulation Multiaccess communication Power dissipation Prototypes Sampling methods Signal processing Signal processing algorithms
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creator	Onodera, K.K. Gray, P.R.
description	A DS-CDMA demodulator uses analog sampled-data signal processing to achieve a 75-mW power dissipation and a 128-MS/s processing rate in a 1.2-/spl mu/m double-metal double-poly CMOS process. To demodulate the signal, a low-power passive correlation technique is introduced that eliminates the integrating opamp with its associated power and settling time overhead. In a prototype demodulator, six 64-chip correlators recover the 2-Mb/s data stream from the doubly modulated [pseudorandom noise (PN) and Walsh] quadrature input signal. An on-chip 10-b pipelined ADC sampling at 8 MS/s follows the analog correlation to permit digital implementation of the acquisition and tracking algorithms.
doi_str_mv	10.1109/4.668990
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An on-chip 10-b pipelined ADC sampling at 8 MS/s follows the analog correlation to permit digital implementation of the acquisition and tracking algorithms.</description><subject>Baseband</subject><subject>CMOS process</subject><subject>Correlators</subject><subject>Demodulation</subject><subject>Multiaccess communication</subject><subject>Power dissipation</subject><subject>Prototypes</subject><subject>Sampling methods</subject><subject>Signal processing</subject><subject>Signal processing algorithms</subject><issn>0018-9200</issn><issn>1558-173X</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1998</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kEFLw0AUhBdRMFbBs6c9etn6XrLJ7h5Dq1ZI9aBiQSRsNm9tJG1CtiL66620eBiGYT7mMIydI4wRwVzJcZZpY-CARZimWqBKFocsAkAtTAxwzE5C-NhGKTVGbJFzlYrVC8dYi_nsh08fxWQ6z3llA1V2XfOaVl392dpNN3C_1bJ5X4rQE9X8qxmopRC47fu2cXbTdOvAX4v8PrydsiNv20Bnex-x55vrp8lMFA-3d5O8EC6WciNqsEQyVmRMZrQmbypwxioXg4HMS1v7hKrE-gq9Q0NKSWmQwKGSmKQ-GbHL3a4buhAG8mU_NCs7fJcI5d8jpSx3j2zRix3aENE_ti9_AcVEWck</recordid><startdate>199805</startdate><enddate>199805</enddate><creator>Onodera, K.K.</creator><creator>Gray, P.R.</creator><general>IEEE</general><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>199805</creationdate><title>A 75-mW 128-MHz DS-CDMA baseband demodulator for high-speed wireless applications [LANs]</title><author>Onodera, K.K. ; Gray, P.R.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c244t-d0aee427e996988ef9b0c9a7c20906f4adf3eb3afb1fc19e774491e0c174135f3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1998</creationdate><topic>Baseband</topic><topic>CMOS process</topic><topic>Correlators</topic><topic>Demodulation</topic><topic>Multiaccess communication</topic><topic>Power dissipation</topic><topic>Prototypes</topic><topic>Sampling methods</topic><topic>Signal processing</topic><topic>Signal processing algorithms</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Onodera, K.K.</creatorcontrib><creatorcontrib>Gray, P.R.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><jtitle>IEEE journal of solid-state circuits</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Onodera, K.K.</au><au>Gray, P.R.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A 75-mW 128-MHz DS-CDMA baseband demodulator for high-speed wireless applications [LANs]</atitle><jtitle>IEEE journal of solid-state circuits</jtitle><stitle>JSSC</stitle><date>1998-05</date><risdate>1998</risdate><volume>33</volume><issue>5</issue><spage>753</spage><epage>761</epage><pages>753-761</pages><issn>0018-9200</issn><eissn>1558-173X</eissn><coden>IJSCBC</coden><abstract>A DS-CDMA demodulator uses analog sampled-data signal processing to achieve a 75-mW power dissipation and a 128-MS/s processing rate in a 1.2-/spl mu/m double-metal double-poly CMOS process. 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subjects	Baseband CMOS process Correlators Demodulation Multiaccess communication Power dissipation Prototypes Sampling methods Signal processing Signal processing algorithms
title	A 75-mW 128-MHz DS-CDMA baseband demodulator for high-speed wireless applications [LANs]
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