Epitaxial Tunnel Layer Structure for P-Channel Tunnel FET Improvement
The tunnel field-effect transistor (FET) is a promising candidate for use in ultralow-power applications because of its distinct operation principle, namely, band to band tunneling (BTBT). However, the ON-state current of the tunnel device is extremely low because of the poor tunneling efficiency of...
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| Veröffentlicht in: | IEEE transactions on electron devices 2013-12, Vol.60 (12), p.4098-4104 |
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| creator | Wang, Pei-Yu Tsui, Bing-Yue |
| description | The tunnel field-effect transistor (FET) is a promising candidate for use in ultralow-power applications because of its distinct operation principle, namely, band to band tunneling (BTBT). However, the ON-state current of the tunnel device is extremely low because of the poor tunneling efficiency of the BTBT. In this paper, a novel epitaxial tunnel layer (ETL) structure combining vertical tunneling orientation was proposed. The ETL structure performs more favorably than does the traditional lateral tunnel FET structure in an all-silicon device. By using low bandgap materials in the ETL, the ON-state BTBT current increases and an extremely low intrinsic OFF-state current is maintained because of the small low bandgap junction area. The onset voltage of the bipolar BTBT can also be postponed using ETL band engineering. The optimized parameters of the SixGe 1-x ETL tunnel FET structure increase the ON-state current 10 7 -10 8 times compared with that of the traditional lateral silicon tunnel FET. The minimal subthreshold swing (SS) and ON/OFF current ratio also improve, the SS decreases from 47 mV/decade to 29 mV/decade, and the ON/OFF current ratio increase from 10 5 to 10 10 . In this paper, the effects of the ETL parameters on device performance are discussed in detail. |
| doi_str_mv | 10.1109/TED.2013.2287633 |
| format | Article |
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However, the ON-state current of the tunnel device is extremely low because of the poor tunneling efficiency of the BTBT. In this paper, a novel epitaxial tunnel layer (ETL) structure combining vertical tunneling orientation was proposed. The ETL structure performs more favorably than does the traditional lateral tunnel FET structure in an all-silicon device. By using low bandgap materials in the ETL, the ON-state BTBT current increases and an extremely low intrinsic OFF-state current is maintained because of the small low bandgap junction area. The onset voltage of the bipolar BTBT can also be postponed using ETL band engineering. The optimized parameters of the SixGe 1-x ETL tunnel FET structure increase the ON-state current 10 7 -10 8 times compared with that of the traditional lateral silicon tunnel FET. The minimal subthreshold swing (SS) and ON/OFF current ratio also improve, the SS decreases from 47 mV/decade to 29 mV/decade, and the ON/OFF current ratio increase from 10 5 to 10 10 . In this paper, the effects of the ETL parameters on device performance are discussed in detail.</description><identifier>ISSN: 0018-9383</identifier><identifier>EISSN: 1557-9646</identifier><identifier>DOI: 10.1109/TED.2013.2287633</identifier><identifier>CODEN: IETDAI</identifier><language>eng</language><publisher>IEEE</publisher><subject>Band to band tunneling ; Doping ; epitaxial tunnel layer (ETL) ; Field effect transistors ; Logic gates ; Photonic band gap ; Silicon ; silicon-germanium ({\rm Si}_{\rm x}{\rm Ge}_{1\hbox{-}{\rm x}}) ; subthreshold swing (SS) ; tunnel field-effect transistor ; Tunneling ; vertical tunneling</subject><ispartof>IEEE transactions on electron devices, 2013-12, Vol.60 (12), p.4098-4104</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c244t-544539c99a50831de065ce7a2e1e09f06e99e9569f7ea03feabbb101cd6b96123</citedby><cites>FETCH-LOGICAL-c244t-544539c99a50831de065ce7a2e1e09f06e99e9569f7ea03feabbb101cd6b96123</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6663625$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6663625$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Wang, Pei-Yu</creatorcontrib><creatorcontrib>Tsui, Bing-Yue</creatorcontrib><title>Epitaxial Tunnel Layer Structure for P-Channel Tunnel FET Improvement</title><title>IEEE transactions on electron devices</title><addtitle>TED</addtitle><description>The tunnel field-effect transistor (FET) is a promising candidate for use in ultralow-power applications because of its distinct operation principle, namely, band to band tunneling (BTBT). However, the ON-state current of the tunnel device is extremely low because of the poor tunneling efficiency of the BTBT. In this paper, a novel epitaxial tunnel layer (ETL) structure combining vertical tunneling orientation was proposed. The ETL structure performs more favorably than does the traditional lateral tunnel FET structure in an all-silicon device. By using low bandgap materials in the ETL, the ON-state BTBT current increases and an extremely low intrinsic OFF-state current is maintained because of the small low bandgap junction area. The onset voltage of the bipolar BTBT can also be postponed using ETL band engineering. The optimized parameters of the SixGe 1-x ETL tunnel FET structure increase the ON-state current 10 7 -10 8 times compared with that of the traditional lateral silicon tunnel FET. The minimal subthreshold swing (SS) and ON/OFF current ratio also improve, the SS decreases from 47 mV/decade to 29 mV/decade, and the ON/OFF current ratio increase from 10 5 to 10 10 . In this paper, the effects of the ETL parameters on device performance are discussed in detail.</description><subject>Band to band tunneling</subject><subject>Doping</subject><subject>epitaxial tunnel layer (ETL)</subject><subject>Field effect transistors</subject><subject>Logic gates</subject><subject>Photonic band gap</subject><subject>Silicon</subject><subject>silicon-germanium ({\rm Si}_{\rm x}{\rm Ge}_{1\hbox{-}{\rm x}})</subject><subject>subthreshold swing (SS)</subject><subject>tunnel field-effect transistor</subject><subject>Tunneling</subject><subject>vertical tunneling</subject><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2013</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kE1LhFAUhi9RkE3tgzb-Ae3cr6N3GWY1IBRka7k6RzL84qrR_PucZmh1eDnP-y4exm45hJyDuc_Tx1AAl6EQcYRSnjGPax0FBhWeMw-Ax4GRsbxkV9P0tUZUSngsTcdmtj-Nbf186Xtq_czuyfnvs1uqeXHk14Pz34Lk0_59T9BTmvvbbnTDN3XUz9fsorbtRDenu2EfK5G8BNnr8zZ5yIJKKDUHWiktTWWM1RBLviNAXVFkBXECUwOSMWQ0mjoiC7ImW5YlB17tsDTIhdwwOO5WbpgmR3Uxuqazbl9wKA4ailVDcdBQnDSslbtjpSGifxwRJQotfwE2v1iH</recordid><startdate>201312</startdate><enddate>201312</enddate><creator>Wang, Pei-Yu</creator><creator>Tsui, Bing-Yue</creator><general>IEEE</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>201312</creationdate><title>Epitaxial Tunnel Layer Structure for P-Channel Tunnel FET Improvement</title><author>Wang, Pei-Yu ; Tsui, Bing-Yue</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c244t-544539c99a50831de065ce7a2e1e09f06e99e9569f7ea03feabbb101cd6b96123</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2013</creationdate><topic>Band to band tunneling</topic><topic>Doping</topic><topic>epitaxial tunnel layer (ETL)</topic><topic>Field effect transistors</topic><topic>Logic gates</topic><topic>Photonic band gap</topic><topic>Silicon</topic><topic>silicon-germanium ({\rm Si}_{\rm x}{\rm Ge}_{1\hbox{-}{\rm x}})</topic><topic>subthreshold swing (SS)</topic><topic>tunnel field-effect transistor</topic><topic>Tunneling</topic><topic>vertical tunneling</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Wang, Pei-Yu</creatorcontrib><creatorcontrib>Tsui, Bing-Yue</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><jtitle>IEEE transactions on electron devices</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Wang, Pei-Yu</au><au>Tsui, Bing-Yue</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Epitaxial Tunnel Layer Structure for P-Channel Tunnel FET Improvement</atitle><jtitle>IEEE transactions on electron devices</jtitle><stitle>TED</stitle><date>2013-12</date><risdate>2013</risdate><volume>60</volume><issue>12</issue><spage>4098</spage><epage>4104</epage><pages>4098-4104</pages><issn>0018-9383</issn><eissn>1557-9646</eissn><coden>IETDAI</coden><abstract>The tunnel field-effect transistor (FET) is a promising candidate for use in ultralow-power applications because of its distinct operation principle, namely, band to band tunneling (BTBT). However, the ON-state current of the tunnel device is extremely low because of the poor tunneling efficiency of the BTBT. In this paper, a novel epitaxial tunnel layer (ETL) structure combining vertical tunneling orientation was proposed. The ETL structure performs more favorably than does the traditional lateral tunnel FET structure in an all-silicon device. By using low bandgap materials in the ETL, the ON-state BTBT current increases and an extremely low intrinsic OFF-state current is maintained because of the small low bandgap junction area. The onset voltage of the bipolar BTBT can also be postponed using ETL band engineering. The optimized parameters of the SixGe 1-x ETL tunnel FET structure increase the ON-state current 10 7 -10 8 times compared with that of the traditional lateral silicon tunnel FET. The minimal subthreshold swing (SS) and ON/OFF current ratio also improve, the SS decreases from 47 mV/decade to 29 mV/decade, and the ON/OFF current ratio increase from 10 5 to 10 10 . In this paper, the effects of the ETL parameters on device performance are discussed in detail.</abstract><pub>IEEE</pub><doi>10.1109/TED.2013.2287633</doi><tpages>7</tpages></addata></record> |
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| subjects | Band to band tunneling Doping epitaxial tunnel layer (ETL) Field effect transistors Logic gates Photonic band gap Silicon silicon-germanium ({\rm Si}_{\rm x}{\rm Ge}_{1\hbox{-}{\rm x}}) subthreshold swing (SS) tunnel field-effect transistor Tunneling vertical tunneling |
| title | Epitaxial Tunnel Layer Structure for P-Channel Tunnel FET Improvement |
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