Coordinated refresh: Energy efficient techniques for DRAM refresh scheduling

As the size and speed of DRAM devices increase, the performance and energy overheads due to refresh become more significant. To reduce refresh penalty we propose techniques referred collectively as "Coordinated Refresh", in which scheduling of low power modes and refresh commands are coord...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Bhati, Ishwar, Chishti, Zeshan, Jacob, Bruce
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Benchmark testing Clocks DRAM refresh Energy efficiency Multicore processing Performance evaluation Random access memory self refresh mode Switches
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