CMOS-fieldemission devices based on silicon surfaces

A CMOS process for field emission devices based on {111} silicon surfaces is presented. Structure sizes below 300nm are produced with i-line lithography and sizes below 100nm with an additional epitaxial layer. Ridges with apex diameters of 40nm are formed by line shaped shadow masks with molecular...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Bachmann, M., Pahlke, A., Axt, C., Hinze, B., Hansch, W.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	CMOS integrated circuits field emitter arrays Lead silicon ridges Substrates
Online-Zugang:	Volltext bestellen
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