On portable macrocell FPU generators for division and square root operators complying to the full IEEE-754 standard
In this paper, we investigate the design of macrocell generators of division and square root floating-point operators. The number representation used in our operators is the IEEE-754-1985 standard for binary floating-point numbers. The design and implementation of the generators rely on a powerful m...
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| Veröffentlicht in: | IEEE transactions on very large scale integration (VLSI) systems 1998-03, Vol.6 (1), p.114-121 |
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| container_title | IEEE transactions on very large scale integration (VLSI) systems |
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| creator | Aberbour, M. Houelle, A. Mehrez, H. Vaucher, N. Guyot, A. |
| description | In this paper, we investigate the design of macrocell generators of division and square root floating-point operators. The number representation used in our operators is the IEEE-754-1985 standard for binary floating-point numbers. The design and implementation of the generators rely on a powerful multi-view macroblock generator tool called GenOptim. This computer-aided design (CAD) tool is able to output a set of different descriptions for several VLSI technologies as well as field programmable gate arrays (FPGAs). The division and square root operators described in this paper use the signed-binary-digit representation. We start first by describing the operators for the significand, then we investigate the IEEE floating-point operators. Throughout this paper, and wherever appropriate, we present the implementation results using the GenOptim environment. |
| doi_str_mv | 10.1109/92.661253 |
| format | Article |
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The number representation used in our operators is the IEEE-754-1985 standard for binary floating-point numbers. The design and implementation of the generators rely on a powerful multi-view macroblock generator tool called GenOptim. This computer-aided design (CAD) tool is able to output a set of different descriptions for several VLSI technologies as well as field programmable gate arrays (FPGAs). The division and square root operators described in this paper use the signed-binary-digit representation. We start first by describing the operators for the significand, then we investigate the IEEE floating-point operators. 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Solid state devices ; Very large scale integration</subject><ispartof>IEEE transactions on very large scale integration (VLSI) systems, 1998-03, Vol.6 (1), p.114-121</ispartof><rights>1998 INIST-CNRS</rights><rights>Distributed under a Creative Commons Attribution 4.0 International License</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c340t-b431bd85043d01bdb4d882f5ae13fc8af5562d19a4785087df4ae8ef3cd6431f3</citedby><cites>FETCH-LOGICAL-c340t-b431bd85043d01bdb4d882f5ae13fc8af5562d19a4785087df4ae8ef3cd6431f3</cites><orcidid>0000-0002-0692-1754</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/661253$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>230,314,780,784,796,885,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/661253$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=2186618$$DView record in Pascal Francis$$Hfree_for_read</backlink><backlink>$$Uhttps://hal.science/hal-00014712$$DView record in HAL$$Hfree_for_read</backlink></links><search><creatorcontrib>Aberbour, M.</creatorcontrib><creatorcontrib>Houelle, A.</creatorcontrib><creatorcontrib>Mehrez, H.</creatorcontrib><creatorcontrib>Vaucher, N.</creatorcontrib><creatorcontrib>Guyot, A.</creatorcontrib><title>On portable macrocell FPU generators for division and square root operators complying to the full IEEE-754 standard</title><title>IEEE transactions on very large scale integration (VLSI) systems</title><addtitle>TVLSI</addtitle><description>In this paper, we investigate the design of macrocell generators of division and square root floating-point operators. The number representation used in our operators is the IEEE-754-1985 standard for binary floating-point numbers. The design and implementation of the generators rely on a powerful multi-view macroblock generator tool called GenOptim. This computer-aided design (CAD) tool is able to output a set of different descriptions for several VLSI technologies as well as field programmable gate arrays (FPGAs). The division and square root operators described in this paper use the signed-binary-digit representation. We start first by describing the operators for the significand, then we investigate the IEEE floating-point operators. Throughout this paper, and wherever appropriate, we present the implementation results using the GenOptim environment.</description><subject>Applied sciences</subject><subject>Design automation</subject><subject>Digital arithmetic</subject><subject>Electronics</subject><subject>Engineering Sciences</subject><subject>Exact sciences and technology</subject><subject>Field programmable gate arrays</subject><subject>Floating-point arithmetic</subject><subject>Integrated circuits</subject><subject>Integrated circuits by function (including memories and processors)</subject><subject>Laboratories</subject><subject>Libraries</subject><subject>Macrocell networks</subject><subject>Micro and nanotechnologies</subject><subject>Microelectronics</subject><subject>Packaging</subject><subject>Power generation</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Very large scale integration</subject><issn>1063-8210</issn><issn>1557-9999</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1998</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpFkUFPwjAYhhejiYgevHrqwZh4GLZdu3VHQkBISPAg5-ZjbaFmrKMdJPx7S0DspV_a530O75ckzwQPCMHlR0kHeU4oz26SHuG8SMt4buOM8ywVlOD75CGEH4wJYyXuJWHRoNb5Dla1RluovKt0XaPJ1xKtdaM9dM4HZJxHyh5ssK5B0CgUdnvwGnnnOuTaP6xy27Y-2maNOoe6jUZmH12z8XicFpyh0MUoePWY3Bmog3663P1kORl_j6bpfPE5Gw3naZUx3KUrlpGVEhyzTOE4rZgSghoOmmSmEmA4z6kiJbAiQqJQhoEW2mSVymPUZP3k_ezdQC1bb7fgj9KBldPhXJ7e8KmGgtADiezbmW292-116OTWhlMV0Gi3D5KKqOQF_5fGqkLw2lzNBMvTCmRJ5XkFkX29SCFUUBsPTWXDNUCJiKCI2MsZs1rr6-_F8QveRo1H</recordid><startdate>19980301</startdate><enddate>19980301</enddate><creator>Aberbour, M.</creator><creator>Houelle, A.</creator><creator>Mehrez, H.</creator><creator>Vaucher, N.</creator><creator>Guyot, A.</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><scope>RIA</scope><scope>RIE</scope><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><scope>1XC</scope><orcidid>https://orcid.org/0000-0002-0692-1754</orcidid></search><sort><creationdate>19980301</creationdate><title>On portable macrocell FPU generators for division and square root operators complying to the full IEEE-754 standard</title><author>Aberbour, M. ; Houelle, A. ; Mehrez, H. ; Vaucher, N. ; Guyot, A.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c340t-b431bd85043d01bdb4d882f5ae13fc8af5562d19a4785087df4ae8ef3cd6431f3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1998</creationdate><topic>Applied sciences</topic><topic>Design automation</topic><topic>Digital arithmetic</topic><topic>Electronics</topic><topic>Engineering Sciences</topic><topic>Exact sciences and technology</topic><topic>Field programmable gate arrays</topic><topic>Floating-point arithmetic</topic><topic>Integrated circuits</topic><topic>Integrated circuits by function (including memories and processors)</topic><topic>Laboratories</topic><topic>Libraries</topic><topic>Macrocell networks</topic><topic>Micro and nanotechnologies</topic><topic>Microelectronics</topic><topic>Packaging</topic><topic>Power generation</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Very large scale integration</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Aberbour, M.</creatorcontrib><creatorcontrib>Houelle, A.</creatorcontrib><creatorcontrib>Mehrez, H.</creatorcontrib><creatorcontrib>Vaucher, N.</creatorcontrib><creatorcontrib>Guyot, A.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Hyper Article en Ligne (HAL)</collection><jtitle>IEEE transactions on very large scale integration (VLSI) systems</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Aberbour, M.</au><au>Houelle, A.</au><au>Mehrez, H.</au><au>Vaucher, N.</au><au>Guyot, A.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>On portable macrocell FPU generators for division and square root operators complying to the full IEEE-754 standard</atitle><jtitle>IEEE transactions on very large scale integration (VLSI) systems</jtitle><stitle>TVLSI</stitle><date>1998-03-01</date><risdate>1998</risdate><volume>6</volume><issue>1</issue><spage>114</spage><epage>121</epage><pages>114-121</pages><issn>1063-8210</issn><eissn>1557-9999</eissn><coden>IEVSE9</coden><abstract>In this paper, we investigate the design of macrocell generators of division and square root floating-point operators. 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| source | IEEE Electronic Library (IEL) |
| subjects | Applied sciences Design automation Digital arithmetic Electronics Engineering Sciences Exact sciences and technology Field programmable gate arrays Floating-point arithmetic Integrated circuits Integrated circuits by function (including memories and processors) Laboratories Libraries Macrocell networks Micro and nanotechnologies Microelectronics Packaging Power generation Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Very large scale integration |
| title | On portable macrocell FPU generators for division and square root operators complying to the full IEEE-754 standard |
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