Minimum Partition for the Space Region of VLSI Layout

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Hauptverfasser: Pei-Yung Hsiao, Chiao-Yi Lin, Chia-Chung Tsai
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Chia-Chung Tsai
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doi_str_mv 10.1109/ICVD.1992.658061
format Conference Proceeding
fullrecord <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_658061</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>658061</ieee_id><sourcerecordid>658061</sourcerecordid><originalsourceid>FETCH-LOGICAL-i89t-63354ac0d6bc9f55cd50b543d5ca169bb63ed99546ebf1e0d6233c7e0611df6f3</originalsourceid><addsrcrecordid>eNotj11LwzAUhoMfYJ27F6_yB1pPkuY051Kq00JFcWO3I00Tjdh1tN3F_r2TefXAy8MLD2O3AjIhgO6rcv2YCSKZoTaA4owlUhlIkaQ6Z3MqDBhhUOao4YIlAlClhFhcsetx_AYAo6FImH6N29jtO_5uhylOsd_y0A98-vJ8ubPO8w__-Tf2ga_rZcVre-j30w27DPZn9PN_zthq8bQqX9L67bkqH-o0GppSVErn1kGLjaOgtWs1NDpXrXZWIDUNKt8S6Rx9E4Q_elIpV_hjjWgDBjVjd6fb6L3f7IbY2eGwOfWqXwXERhg</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Minimum Partition for the Space Region of VLSI Layout</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Pei-Yung Hsiao ; Chiao-Yi Lin ; Chia-Chung Tsai</creator><creatorcontrib>Pei-Yung Hsiao ; Chiao-Yi Lin ; Chia-Chung Tsai</creatorcontrib><identifier>ISSN: 1063-9667</identifier><identifier>ISBN: 9780818624650</identifier><identifier>ISBN: 0818624655</identifier><identifier>EISSN: 2380-6923</identifier><identifier>DOI: 10.1109/ICVD.1992.658061</identifier><language>eng</language><publisher>IEEE</publisher><subject>Data structures ; Heuristic algorithms ; Information science ; Strips ; Tiles ; Very large scale integration</subject><ispartof>The Fifth International Conference on VLSI Design, 1992, p.273-276</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/658061$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,776,780,785,786,2051,4035,4036,27904,54898</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/658061$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Pei-Yung Hsiao</creatorcontrib><creatorcontrib>Chiao-Yi Lin</creatorcontrib><creatorcontrib>Chia-Chung Tsai</creatorcontrib><title>Minimum Partition for the Space Region of VLSI Layout</title><title>The Fifth International Conference on VLSI Design</title><addtitle>ICVD</addtitle><subject>Data structures</subject><subject>Heuristic algorithms</subject><subject>Information science</subject><subject>Strips</subject><subject>Tiles</subject><subject>Very large scale integration</subject><issn>1063-9667</issn><issn>2380-6923</issn><isbn>9780818624650</isbn><isbn>0818624655</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>1992</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotj11LwzAUhoMfYJ27F6_yB1pPkuY051Kq00JFcWO3I00Tjdh1tN3F_r2TefXAy8MLD2O3AjIhgO6rcv2YCSKZoTaA4owlUhlIkaQ6Z3MqDBhhUOao4YIlAlClhFhcsetx_AYAo6FImH6N29jtO_5uhylOsd_y0A98-vJ8ubPO8w__-Tf2ga_rZcVre-j30w27DPZn9PN_zthq8bQqX9L67bkqH-o0GppSVErn1kGLjaOgtWs1NDpXrXZWIDUNKt8S6Rx9E4Q_elIpV_hjjWgDBjVjd6fb6L3f7IbY2eGwOfWqXwXERhg</recordid><startdate>1992</startdate><enddate>1992</enddate><creator>Pei-Yung Hsiao</creator><creator>Chiao-Yi Lin</creator><creator>Chia-Chung Tsai</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>1992</creationdate><title>Minimum Partition for the Space Region of VLSI Layout</title><author>Pei-Yung Hsiao ; Chiao-Yi Lin ; Chia-Chung Tsai</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i89t-63354ac0d6bc9f55cd50b543d5ca169bb63ed99546ebf1e0d6233c7e0611df6f3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>1992</creationdate><topic>Data structures</topic><topic>Heuristic algorithms</topic><topic>Information science</topic><topic>Strips</topic><topic>Tiles</topic><topic>Very large scale integration</topic><toplevel>online_resources</toplevel><creatorcontrib>Pei-Yung Hsiao</creatorcontrib><creatorcontrib>Chiao-Yi Lin</creatorcontrib><creatorcontrib>Chia-Chung Tsai</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Pei-Yung Hsiao</au><au>Chiao-Yi Lin</au><au>Chia-Chung Tsai</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Minimum Partition for the Space Region of VLSI Layout</atitle><btitle>The Fifth International Conference on VLSI Design</btitle><stitle>ICVD</stitle><date>1992</date><risdate>1992</risdate><spage>273</spage><epage>276</epage><pages>273-276</pages><issn>1063-9667</issn><eissn>2380-6923</eissn><isbn>9780818624650</isbn><isbn>0818624655</isbn><pub>IEEE</pub><doi>10.1109/ICVD.1992.658061</doi><tpages>4</tpages></addata></record>
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identifier ISSN: 1063-9667
ispartof The Fifth International Conference on VLSI Design, 1992, p.273-276
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2380-6923
language eng
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source IEEE Electronic Library (IEL) Conference Proceedings
subjects Data structures
Heuristic algorithms
Information science
Strips
Tiles
Very large scale integration
title Minimum Partition for the Space Region of VLSI Layout
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-26T06%3A04%3A54IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Minimum%20Partition%20for%20the%20Space%20Region%20of%20VLSI%20Layout&rft.btitle=The%20Fifth%20International%20Conference%20on%20VLSI%20Design&rft.au=Pei-Yung%20Hsiao&rft.date=1992&rft.spage=273&rft.epage=276&rft.pages=273-276&rft.issn=1063-9667&rft.eissn=2380-6923&rft.isbn=9780818624650&rft.isbn_list=0818624655&rft_id=info:doi/10.1109/ICVD.1992.658061&rft_dat=%3Cieee_6IE%3E658061%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=658061&rfr_iscdi=true