First demonstration of a full 28nm high-k/metal gate circuit transfer from Bulk to UTBB FDSOI technology through hybrid integration

For the first time a full hybrid integration scheme is proposed, allowing a full circuit design transfer from 28nm Bulk CMOS high-k/metal gate onto UTBB FDSOI with minimum design effort. As the performance of FDSOI logic and SRAM devices have already been reported, this paper highlights the original...

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Hauptverfasser: Golanski, D., Fonteneau, P., Fenouillet-Beranger, C., Cros, A., Monsieur, F., Guitard, N., Legrand, C-A, Dray, A., Richier, C., Beckrich, H., Mora, P., Bidal, G., Weber, O., Saxod, O., Manouvrier, J-R, Galy, P., Planes, N., Arnaud, F.
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creator Golanski, D.
Fonteneau, P.
Fenouillet-Beranger, C.
Cros, A.
Monsieur, F.
Guitard, N.
Legrand, C-A
Dray, A.
Richier, C.
Beckrich, H.
Mora, P.
Bidal, G.
Weber, O.
Saxod, O.
Manouvrier, J-R
Galy, P.
Planes, N.
Arnaud, F.
description For the first time a full hybrid integration scheme is proposed, allowing a full circuit design transfer from 28nm Bulk CMOS high-k/metal gate onto UTBB FDSOI with minimum design effort. As the performance of FDSOI logic and SRAM devices have already been reported, this paper highlights the original way to integrate ESD devices, variable MOS capacitors and vertical bipolar transistor within the frame of our hybrid technology. Competitive ESD performance for the same footprint is achieved through hybrid MOSFETS snap-back voltage reduction, obtained by implant engineering. In addition, we demonstrate that the performance of Silicon Controlled Rectifier (SCR) and ESD diodes are matched vs Bulk technology while maintaining the performance of FDSOI devices and without any additional masks.
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subjects Electrostatic discharges
Implants
Junctions
Logic gates
MOSFET
Performance evaluation
Thyristors
title First demonstration of a full 28nm high-k/metal gate circuit transfer from Bulk to UTBB FDSOI technology through hybrid integration
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