End to end simulation of sigma delta ADC
End to end simulation of sigma delta ADC is described here. The first order sigma delta modulator is designed to work with an input signal band of 24 KHz at an oversampling ratio of 64 with a sampling frequency of 3.07 MHz. The analog section of the ADC is simulated in MATLAB as well as in excel spr...
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creator | Joseph, Merene Sreelal, S. Edathala, Jose J. |
description | End to end simulation of sigma delta ADC is described here. The first order sigma delta modulator is designed to work with an input signal band of 24 KHz at an oversampling ratio of 64 with a sampling frequency of 3.07 MHz. The analog section of the ADC is simulated in MATLAB as well as in excel spread sheet. Likewise the design of digital section includes the design of an FIR digital/decimation filter whose simulation is also presented here. |
doi_str_mv | 10.1109/AICERA-ICMiCR.2013.6576009 |
format | Conference Proceeding |
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The first order sigma delta modulator is designed to work with an input signal band of 24 KHz at an oversampling ratio of 64 with a sampling frequency of 3.07 MHz. The analog section of the ADC is simulated in MATLAB as well as in excel spread sheet. Likewise the design of digital section includes the design of an FIR digital/decimation filter whose simulation is also presented here.</description><subject>Excel spreadsheet simulation</subject><subject>Finite impulse response filters</subject><subject>FIR digital filter</subject><subject>Frequency modulation</subject><subject>IIR filters</subject><subject>MATLAB</subject><subject>Oversampling</subject><subject>Sigma Delta Modulation</subject><isbn>1467351504</isbn><isbn>9781467351508</isbn><isbn>9781467351485</isbn><isbn>1467351490</isbn><isbn>9781467351492</isbn><isbn>1467351482</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2013</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotjz1LxEAUAFdEUM_8AptgZZP4XnbffpRhPTVwIhxaH0vyVlaSi1xi4b83YKphmoER4g6hRAT3UDd-u6-Lxr8mvy8rQFlqMhrAnYnMGYtKG0moLJ2L61UI1KXIpukLAJaIdtJeifvtscvnMecFUxp--jCn8ZiPcbHPIeQd93PI60d_Iy5i6CfOVm7Ex9P23b8Uu7fnxte7IqGhuTDGhiDRGKVAo3MyKOqw0q61ABWbqDiyJmmZVCBiW3Wxa7XE1poYmeRG3P53EzMfvk9pCKffwzon_wCCeEJa</recordid><startdate>201306</startdate><enddate>201306</enddate><creator>Joseph, Merene</creator><creator>Sreelal, S.</creator><creator>Edathala, Jose J.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>201306</creationdate><title>End to end simulation of sigma delta ADC</title><author>Joseph, Merene ; Sreelal, S. ; Edathala, Jose J.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-778aa317744061993a45d1269c8002e7f4efe6538e54a55e82dfdc631c87ffe53</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2013</creationdate><topic>Excel spreadsheet simulation</topic><topic>Finite impulse response filters</topic><topic>FIR digital filter</topic><topic>Frequency modulation</topic><topic>IIR filters</topic><topic>MATLAB</topic><topic>Oversampling</topic><topic>Sigma Delta Modulation</topic><toplevel>online_resources</toplevel><creatorcontrib>Joseph, Merene</creatorcontrib><creatorcontrib>Sreelal, S.</creatorcontrib><creatorcontrib>Edathala, Jose J.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Joseph, Merene</au><au>Sreelal, S.</au><au>Edathala, Jose J.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>End to end simulation of sigma delta ADC</atitle><btitle>2013 Annual International Conference on Emerging Research Areas and 2013 International Conference on Microelectronics, Communications and Renewable Energy</btitle><stitle>AICERA-ICMiCR</stitle><date>2013-06</date><risdate>2013</risdate><spage>1</spage><epage>4</epage><pages>1-4</pages><isbn>1467351504</isbn><isbn>9781467351508</isbn><eisbn>9781467351485</eisbn><eisbn>1467351490</eisbn><eisbn>9781467351492</eisbn><eisbn>1467351482</eisbn><abstract>End to end simulation of sigma delta ADC is described here. The first order sigma delta modulator is designed to work with an input signal band of 24 KHz at an oversampling ratio of 64 with a sampling frequency of 3.07 MHz. The analog section of the ADC is simulated in MATLAB as well as in excel spread sheet. Likewise the design of digital section includes the design of an FIR digital/decimation filter whose simulation is also presented here.</abstract><pub>IEEE</pub><doi>10.1109/AICERA-ICMiCR.2013.6576009</doi><tpages>4</tpages></addata></record> |
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language | eng |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Excel spreadsheet simulation Finite impulse response filters FIR digital filter Frequency modulation IIR filters MATLAB Oversampling Sigma Delta Modulation |
title | End to end simulation of sigma delta ADC |
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