Integration challenges of TSV backside via reveal process

Through-Silicon Vias [TSV] offer a method to improved electrical signal speeds by reducing interconnect length. Via Reveal - a wafer back side process steps - is key to the successful implementation of TSV. After via formation, finished CMOS wafers or interposers are temporarily bonded with glass ca...

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Bibliographische Detailangaben
Hauptverfasser: Bo Kai Huang, Chien Ming Lin, Shin Jiang Huang, Ching Wen Chiang, Pin Cheng Huang, Guang Xin Chen, Chun Chieh Chao, Chun Hung Lu
Format: Tagungsbericht
Sprache:eng
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