Warpage analysis and improvement for a power module
Comparing with the single-chip power packages, the power modules usually have a much larger size due to multiple die built inside. This may induce quite a big package warpage in the assembly process, especially after molding, which makes the package warpage big impact on the DBC substrate, as well a...
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creator | Yong Liu Yumin Liu Zhongfa Yuan Chen, Tyler Keunhyuk Lee Belani, Suresh |
description | Comparing with the single-chip power packages, the power modules usually have a much larger size due to multiple die built inside. This may induce quite a big package warpage in the assembly process, especially after molding, which makes the package warpage big impact on the DBC substrate, as well as on the silicon die when mounting the power module to an external heat sink during application. Therefore, in this paper, the warpage after molding process of a power module is investigated, and an improvement method is introduced. After molding, the DBC side of the power module may have convex warpage. To reduce the convex warpage, the pre-concave warpage of the DBC substrate is generated during molding process, to balance off part of the convex warpage. However, the concave profile at the DBC side may cause some flash issue around the DBC area during transferring molding process. Both FEA modeling and practical measurement of the package warpage of the power module are conducted thoroughly. It is found that the trends of FEA simulation results are consistent with the measurement data for the package warpage. By balancing off the warpage issue and flash issue, a better option of the preconcave warpage of the DBC substrate is presented for mass production. |
doi_str_mv | 10.1109/ECTC.2013.6575614 |
format | Conference Proceeding |
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This may induce quite a big package warpage in the assembly process, especially after molding, which makes the package warpage big impact on the DBC substrate, as well as on the silicon die when mounting the power module to an external heat sink during application. Therefore, in this paper, the warpage after molding process of a power module is investigated, and an improvement method is introduced. After molding, the DBC side of the power module may have convex warpage. To reduce the convex warpage, the pre-concave warpage of the DBC substrate is generated during molding process, to balance off part of the convex warpage. However, the concave profile at the DBC side may cause some flash issue around the DBC area during transferring molding process. Both FEA modeling and practical measurement of the package warpage of the power module are conducted thoroughly. It is found that the trends of FEA simulation results are consistent with the measurement data for the package warpage. By balancing off the warpage issue and flash issue, a better option of the preconcave warpage of the DBC substrate is presented for mass production.</description><identifier>ISSN: 0569-5503</identifier><identifier>ISBN: 9781479902330</identifier><identifier>ISBN: 1479902330</identifier><identifier>EISSN: 2377-5726</identifier><identifier>EISBN: 1479902322</identifier><identifier>EISBN: 9781479902323</identifier><identifier>DOI: 10.1109/ECTC.2013.6575614</identifier><language>eng</language><publisher>IEEE</publisher><subject>Ceramics ; Compounds ; Heat sinks ; Multichip modules ; Power measurement ; Semiconductor device measurement ; Substrates</subject><ispartof>2013 IEEE 63rd Electronic Components and Technology Conference, 2013, p.475-480</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6575614$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,776,780,785,786,2051,27904,54898</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6575614$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Yong Liu</creatorcontrib><creatorcontrib>Yumin Liu</creatorcontrib><creatorcontrib>Zhongfa Yuan</creatorcontrib><creatorcontrib>Chen, Tyler</creatorcontrib><creatorcontrib>Keunhyuk Lee</creatorcontrib><creatorcontrib>Belani, Suresh</creatorcontrib><title>Warpage analysis and improvement for a power module</title><title>2013 IEEE 63rd Electronic Components and Technology Conference</title><addtitle>ECTC</addtitle><description>Comparing with the single-chip power packages, the power modules usually have a much larger size due to multiple die built inside. This may induce quite a big package warpage in the assembly process, especially after molding, which makes the package warpage big impact on the DBC substrate, as well as on the silicon die when mounting the power module to an external heat sink during application. Therefore, in this paper, the warpage after molding process of a power module is investigated, and an improvement method is introduced. After molding, the DBC side of the power module may have convex warpage. To reduce the convex warpage, the pre-concave warpage of the DBC substrate is generated during molding process, to balance off part of the convex warpage. However, the concave profile at the DBC side may cause some flash issue around the DBC area during transferring molding process. Both FEA modeling and practical measurement of the package warpage of the power module are conducted thoroughly. It is found that the trends of FEA simulation results are consistent with the measurement data for the package warpage. By balancing off the warpage issue and flash issue, a better option of the preconcave warpage of the DBC substrate is presented for mass production.</description><subject>Ceramics</subject><subject>Compounds</subject><subject>Heat sinks</subject><subject>Multichip modules</subject><subject>Power measurement</subject><subject>Semiconductor device measurement</subject><subject>Substrates</subject><issn>0569-5503</issn><issn>2377-5726</issn><isbn>9781479902330</isbn><isbn>1479902330</isbn><isbn>1479902322</isbn><isbn>9781479902323</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2013</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNo1j81Kw0AUhcc_MK19AHEzL5B479yZzNylhFaFgpuKyzJxJhJJmjCpSt_egnV1Dhz4-I4QtwgFIvD9stpUhQKkojTWlKjPxAy1ZQZFSp2LTJG1ubGqvBALtu5_I7gUGZiSc2OArsVsmj4BNAC6TNCbT6P_iNLvfHeY2ulYgmz7MQ3fsY-7vWyGJL0ch5-YZD-Ery7eiKvGd1NcnHIuXlfLTfWUr18en6uHdd6iNfs8ELEhr7R2xMDKHpUsBFfb2gSPzh1NS2ViYIus3TvUKjQaDTCTczrSXNz9cdsY43ZMbe_TYXs6T79Y90bh</recordid><startdate>201305</startdate><enddate>201305</enddate><creator>Yong Liu</creator><creator>Yumin Liu</creator><creator>Zhongfa Yuan</creator><creator>Chen, Tyler</creator><creator>Keunhyuk Lee</creator><creator>Belani, Suresh</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>201305</creationdate><title>Warpage analysis and improvement for a power module</title><author>Yong Liu ; Yumin Liu ; Zhongfa Yuan ; Chen, Tyler ; Keunhyuk Lee ; Belani, Suresh</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-d33953a244839092778170d8b7b5da188726625ed971948c0b2df4150993884e3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2013</creationdate><topic>Ceramics</topic><topic>Compounds</topic><topic>Heat sinks</topic><topic>Multichip modules</topic><topic>Power measurement</topic><topic>Semiconductor device measurement</topic><topic>Substrates</topic><toplevel>online_resources</toplevel><creatorcontrib>Yong Liu</creatorcontrib><creatorcontrib>Yumin Liu</creatorcontrib><creatorcontrib>Zhongfa Yuan</creatorcontrib><creatorcontrib>Chen, Tyler</creatorcontrib><creatorcontrib>Keunhyuk Lee</creatorcontrib><creatorcontrib>Belani, Suresh</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Yong Liu</au><au>Yumin Liu</au><au>Zhongfa Yuan</au><au>Chen, Tyler</au><au>Keunhyuk Lee</au><au>Belani, Suresh</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Warpage analysis and improvement for a power module</atitle><btitle>2013 IEEE 63rd Electronic Components and Technology Conference</btitle><stitle>ECTC</stitle><date>2013-05</date><risdate>2013</risdate><spage>475</spage><epage>480</epage><pages>475-480</pages><issn>0569-5503</issn><eissn>2377-5726</eissn><isbn>9781479902330</isbn><isbn>1479902330</isbn><eisbn>1479902322</eisbn><eisbn>9781479902323</eisbn><abstract>Comparing with the single-chip power packages, the power modules usually have a much larger size due to multiple die built inside. This may induce quite a big package warpage in the assembly process, especially after molding, which makes the package warpage big impact on the DBC substrate, as well as on the silicon die when mounting the power module to an external heat sink during application. Therefore, in this paper, the warpage after molding process of a power module is investigated, and an improvement method is introduced. After molding, the DBC side of the power module may have convex warpage. To reduce the convex warpage, the pre-concave warpage of the DBC substrate is generated during molding process, to balance off part of the convex warpage. However, the concave profile at the DBC side may cause some flash issue around the DBC area during transferring molding process. Both FEA modeling and practical measurement of the package warpage of the power module are conducted thoroughly. It is found that the trends of FEA simulation results are consistent with the measurement data for the package warpage. By balancing off the warpage issue and flash issue, a better option of the preconcave warpage of the DBC substrate is presented for mass production.</abstract><pub>IEEE</pub><doi>10.1109/ECTC.2013.6575614</doi><tpages>6</tpages></addata></record> |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Ceramics Compounds Heat sinks Multichip modules Power measurement Semiconductor device measurement Substrates |
title | Warpage analysis and improvement for a power module |
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