A digitally-calibrated 20-Gb/s 60-GHz direct-conversion transceiver in 65-nm CMOS
This paper presents a digitally-calibrated 60-GHz direct-conversion transceiver. To improve the error vector magnitude (EVM) performance over the wide bandwidth, a digital calibration technique is applied. The 60-GHz transceiver implemented by 65 nm CMOS achieves the maximum data rates of 20 Gb/s in...
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creator | Kawai, Seitaro Minami, Ryo Tsukui, Yuki Takeuchi, Yasuaki Asada, Hiroki Musa, Ahmed Murakami, Rui Sato, Takahiro Qinghong Bu Ning Li Miyahara, Masaya Okada, Kenichi Matsuzawa, Akira |
description | This paper presents a digitally-calibrated 60-GHz direct-conversion transceiver. To improve the error vector magnitude (EVM) performance over the wide bandwidth, a digital calibration technique is applied. The 60-GHz transceiver implemented by 65 nm CMOS achieves the maximum data rates of 20 Gb/s in 16QAM mode. The transmitter and receiver consume 351 mW and 238 mW from 1.2 V supply, respectively. As a 60-GHz transceiver, the best Tx-to-Rx EVM performance of -26.2 dB is achieved for 16QAM 7Gb/s data rate. |
doi_str_mv | 10.1109/RFIC.2013.6569543 |
format | Conference Proceeding |
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To improve the error vector magnitude (EVM) performance over the wide bandwidth, a digital calibration technique is applied. The 60-GHz transceiver implemented by 65 nm CMOS achieves the maximum data rates of 20 Gb/s in 16QAM mode. The transmitter and receiver consume 351 mW and 238 mW from 1.2 V supply, respectively. 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To improve the error vector magnitude (EVM) performance over the wide bandwidth, a digital calibration technique is applied. The 60-GHz transceiver implemented by 65 nm CMOS achieves the maximum data rates of 20 Gb/s in 16QAM mode. The transmitter and receiver consume 351 mW and 238 mW from 1.2 V supply, respectively. As a 60-GHz transceiver, the best Tx-to-Rx EVM performance of -26.2 dB is achieved for 16QAM 7Gb/s data rate.</description><subject>60GHz</subject><subject>Baseband</subject><subject>Calibration</subject><subject>CMOS</subject><subject>CMOS integrated circuits</subject><subject>direct-conversion transceiver</subject><subject>Gain</subject><subject>IQ-mismatch</subject><subject>millimeter-wave</subject><subject>Mixers</subject><subject>Phase locked loops</subject><subject>Transceivers</subject><issn>1529-2517</issn><issn>2375-0995</issn><isbn>9781467360593</isbn><isbn>1467360597</isbn><isbn>9781467360609</isbn><isbn>1467360627</isbn><isbn>9781467360623</isbn><isbn>1467360600</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2013</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpNkMlqwzAURdUJatJ8QOlGP6BEgyX5LYNpBkgJndbhWX4qKo5TbFNIv76GZtHV4XIvZ3EZu1dyppSE-ctyU860VGbmrAObmws2BV-o3HnjpJNwyTJtvBUSwF797yyYa5Ypq0Foq_wtm_b9p5Ry1DpQLmPPC16njzRg05xEwCZVHQ5Ucy3Fqpr33I1c_4ybjsIgwrH9pq5Px5YPHbZ9oDRmnlrurGgPvHzavd6xm4hNT9MzJ-x9-fhWrsV2t9qUi61IyttBRB3Qg8IAMZeANeUhojOEJCFCDIWiinykwkPtVNQFFLmvEOvaFpV22kzYw583EdH-q0sH7E7780HmF9g1U_0</recordid><startdate>201306</startdate><enddate>201306</enddate><creator>Kawai, Seitaro</creator><creator>Minami, Ryo</creator><creator>Tsukui, Yuki</creator><creator>Takeuchi, Yasuaki</creator><creator>Asada, Hiroki</creator><creator>Musa, Ahmed</creator><creator>Murakami, Rui</creator><creator>Sato, Takahiro</creator><creator>Qinghong Bu</creator><creator>Ning Li</creator><creator>Miyahara, Masaya</creator><creator>Okada, Kenichi</creator><creator>Matsuzawa, Akira</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>201306</creationdate><title>A digitally-calibrated 20-Gb/s 60-GHz direct-conversion transceiver in 65-nm CMOS</title><author>Kawai, Seitaro ; Minami, Ryo ; Tsukui, Yuki ; Takeuchi, Yasuaki ; Asada, Hiroki ; Musa, Ahmed ; Murakami, Rui ; Sato, Takahiro ; Qinghong Bu ; Ning Li ; Miyahara, Masaya ; Okada, Kenichi ; Matsuzawa, Akira</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-f2ca791ac9f409ade4cfa63eae09f9fc81ebe7fe879d61f289847baadd58b2623</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2013</creationdate><topic>60GHz</topic><topic>Baseband</topic><topic>Calibration</topic><topic>CMOS</topic><topic>CMOS integrated circuits</topic><topic>direct-conversion transceiver</topic><topic>Gain</topic><topic>IQ-mismatch</topic><topic>millimeter-wave</topic><topic>Mixers</topic><topic>Phase locked loops</topic><topic>Transceivers</topic><toplevel>online_resources</toplevel><creatorcontrib>Kawai, Seitaro</creatorcontrib><creatorcontrib>Minami, Ryo</creatorcontrib><creatorcontrib>Tsukui, Yuki</creatorcontrib><creatorcontrib>Takeuchi, Yasuaki</creatorcontrib><creatorcontrib>Asada, Hiroki</creatorcontrib><creatorcontrib>Musa, Ahmed</creatorcontrib><creatorcontrib>Murakami, Rui</creatorcontrib><creatorcontrib>Sato, Takahiro</creatorcontrib><creatorcontrib>Qinghong Bu</creatorcontrib><creatorcontrib>Ning Li</creatorcontrib><creatorcontrib>Miyahara, Masaya</creatorcontrib><creatorcontrib>Okada, Kenichi</creatorcontrib><creatorcontrib>Matsuzawa, Akira</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Kawai, Seitaro</au><au>Minami, Ryo</au><au>Tsukui, Yuki</au><au>Takeuchi, Yasuaki</au><au>Asada, Hiroki</au><au>Musa, Ahmed</au><au>Murakami, Rui</au><au>Sato, Takahiro</au><au>Qinghong Bu</au><au>Ning Li</au><au>Miyahara, Masaya</au><au>Okada, Kenichi</au><au>Matsuzawa, Akira</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A digitally-calibrated 20-Gb/s 60-GHz direct-conversion transceiver in 65-nm CMOS</atitle><btitle>2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)</btitle><stitle>RFIC</stitle><date>2013-06</date><risdate>2013</risdate><spage>137</spage><epage>140</epage><pages>137-140</pages><issn>1529-2517</issn><eissn>2375-0995</eissn><isbn>9781467360593</isbn><isbn>1467360597</isbn><eisbn>9781467360609</eisbn><eisbn>1467360627</eisbn><eisbn>9781467360623</eisbn><eisbn>1467360600</eisbn><abstract>This paper presents a digitally-calibrated 60-GHz direct-conversion transceiver. To improve the error vector magnitude (EVM) performance over the wide bandwidth, a digital calibration technique is applied. The 60-GHz transceiver implemented by 65 nm CMOS achieves the maximum data rates of 20 Gb/s in 16QAM mode. The transmitter and receiver consume 351 mW and 238 mW from 1.2 V supply, respectively. As a 60-GHz transceiver, the best Tx-to-Rx EVM performance of -26.2 dB is achieved for 16QAM 7Gb/s data rate.</abstract><pub>IEEE</pub><doi>10.1109/RFIC.2013.6569543</doi><tpages>4</tpages></addata></record> |
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subjects | 60GHz Baseband Calibration CMOS CMOS integrated circuits direct-conversion transceiver Gain IQ-mismatch millimeter-wave Mixers Phase locked loops Transceivers |
title | A digitally-calibrated 20-Gb/s 60-GHz direct-conversion transceiver in 65-nm CMOS |
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