Constraints space management for the layout of analog IC's
An automated technique to narrow down the number of parameters for linear constraint transformation models of analog circuits is described. The sets of more important circuit parameters and specifications are confined in an efficient constraint transformation model. The method is based on least squa...
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| creator | Arsintescu, B.G. Otten, R.H.J.M. |
| description | An automated technique to narrow down the number of parameters for linear constraint transformation models of analog circuits is described. The sets of more important circuit parameters and specifications are confined in an efficient constraint transformation model. The method is based on least square approximation and principal component analysis of the sensitivity matrix of the transformation. The resulting model encompasses the constraints confined using designers' expertise for approximated circuit calculations. |
| doi_str_mv | 10.1109/DATE.1998.655994 |
| format | Conference Proceeding |
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The resulting model encompasses the constraints confined using designers' expertise for approximated circuit calculations.</description><subject>Analog circuits</subject><subject>Analog integrated circuits</subject><subject>Design methodology</subject><subject>Fabrication</subject><subject>Integrated circuit layout</subject><subject>Least squares approximation</subject><subject>Matrix decomposition</subject><subject>Principal component analysis</subject><subject>Reduced order systems</subject><subject>Space technology</subject><isbn>9780818683596</isbn><isbn>0818683597</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>1998</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotj79LAzEYhgMiKPV2ccrmdGdy35dfbuWstVBwqXNJ0qSe3F3KJQ797y3Ud3mGBx54CXnkrOGcmZe35W7VcGN0I4UwBm9IZZRmmmupQRh5R6qcf9hlYJBLcU9euzTlMtt-Kpnmk_WBjnayxzCGqdCYZlq-Ax3sOf0WmiK9uCEd6aZ7zg_kNtohh-qfC_L1vtp1H_X2c73pltu65wpLrXSrvQPPInBErzwKp3wbJaCVzoILTOqWgwOuxcEhWqEO0SkFiGA8wII8Xbt9CGF_mvvRzuf99SD8Ad9LRN0</recordid><startdate>1998</startdate><enddate>1998</enddate><creator>Arsintescu, B.G.</creator><creator>Otten, R.H.J.M.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>1998</creationdate><title>Constraints space management for the layout of analog IC's</title><author>Arsintescu, B.G. ; Otten, R.H.J.M.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i174t-7828cb3c0f3144c7c45b7c2f634a6ba3be068213b3185db44a57dfb7734439c33</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>1998</creationdate><topic>Analog circuits</topic><topic>Analog integrated circuits</topic><topic>Design methodology</topic><topic>Fabrication</topic><topic>Integrated circuit layout</topic><topic>Least squares approximation</topic><topic>Matrix decomposition</topic><topic>Principal component analysis</topic><topic>Reduced order systems</topic><topic>Space technology</topic><toplevel>online_resources</toplevel><creatorcontrib>Arsintescu, B.G.</creatorcontrib><creatorcontrib>Otten, R.H.J.M.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Arsintescu, B.G.</au><au>Otten, R.H.J.M.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Constraints space management for the layout of analog IC's</atitle><btitle>Proceedings Design, Automation and Test in Europe</btitle><stitle>DATE</stitle><date>1998</date><risdate>1998</risdate><spage>971</spage><epage>972</epage><pages>971-972</pages><isbn>9780818683596</isbn><isbn>0818683597</isbn><abstract>An automated technique to narrow down the number of parameters for linear constraint transformation models of analog circuits is described. The sets of more important circuit parameters and specifications are confined in an efficient constraint transformation model. The method is based on least square approximation and principal component analysis of the sensitivity matrix of the transformation. The resulting model encompasses the constraints confined using designers' expertise for approximated circuit calculations.</abstract><pub>IEEE</pub><doi>10.1109/DATE.1998.655994</doi><tpages>2</tpages></addata></record> |
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| identifier | ISBN: 9780818683596 |
| ispartof | Proceedings Design, Automation and Test in Europe, 1998, p.971-972 |
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| language | eng |
| recordid | cdi_ieee_primary_655994 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Analog circuits Analog integrated circuits Design methodology Fabrication Integrated circuit layout Least squares approximation Matrix decomposition Principal component analysis Reduced order systems Space technology |
| title | Constraints space management for the layout of analog IC's |
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