A novel methodology for thermal characterization of power packages in high current applications
This article describes the thermal characterization of semiconductor packages that include MOSFET solutions for high current capability applications. MOSFETs have three kinds of electrical characteristic parameters in regards to the heat generation of the silicon die, such as linear, saturation and...
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| creator | Lee, ByoungOk A-Rom Moon JoonSeo Son JiHwan Kim |
| description | This article describes the thermal characterization of semiconductor packages that include MOSFET solutions for high current capability applications. MOSFETs have three kinds of electrical characteristic parameters in regards to the heat generation of the silicon die, such as linear, saturation and parasitic diode mode. This paper shows the results of a study on thermal characterization according to those electrical characteristics and parameters. The thermal resistance is defined by the function of the temperature difference between junction to referenced temperature and the power dissipation between them. Therefore, the thermal resistance has a different value due to different heating characteristics such as linear mode, saturation mode and diode mode heating respectively. For this paper, thermal simulation and measurement were conducted using CFD simulation and experimentation. In the results illustrated various thermal characteristics depending on the different structure of packages having either Al bonding directly to the substrate or Al bonding to the lead frame with DBC substrate. |
| doi_str_mv | 10.1109/EuroSimE.2013.6529942 |
| format | Conference Proceeding |
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MOSFETs have three kinds of electrical characteristic parameters in regards to the heat generation of the silicon die, such as linear, saturation and parasitic diode mode. This paper shows the results of a study on thermal characterization according to those electrical characteristics and parameters. The thermal resistance is defined by the function of the temperature difference between junction to referenced temperature and the power dissipation between them. Therefore, the thermal resistance has a different value due to different heating characteristics such as linear mode, saturation mode and diode mode heating respectively. For this paper, thermal simulation and measurement were conducted using CFD simulation and experimentation. In the results illustrated various thermal characteristics depending on the different structure of packages having either Al bonding directly to the substrate or Al bonding to the lead frame with DBC substrate.</description><identifier>ISBN: 9781467361385</identifier><identifier>ISBN: 1467361380</identifier><identifier>EISBN: 1467361399</identifier><identifier>EISBN: 9781467361378</identifier><identifier>EISBN: 9781467361392</identifier><identifier>EISBN: 1467361372</identifier><identifier>DOI: 10.1109/EuroSimE.2013.6529942</identifier><language>eng</language><publisher>IEEE</publisher><subject>Abstracts ; Bonding ; Electrical resistance measurement ; Heating ; Resistance ; Substrates</subject><ispartof>2013 14th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE), 2013, p.1-6</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6529942$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2056,27924,54919</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6529942$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Lee, ByoungOk</creatorcontrib><creatorcontrib>A-Rom Moon</creatorcontrib><creatorcontrib>JoonSeo Son</creatorcontrib><creatorcontrib>JiHwan Kim</creatorcontrib><title>A novel methodology for thermal characterization of power packages in high current applications</title><title>2013 14th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)</title><addtitle>EuroSimE</addtitle><description>This article describes the thermal characterization of semiconductor packages that include MOSFET solutions for high current capability applications. MOSFETs have three kinds of electrical characteristic parameters in regards to the heat generation of the silicon die, such as linear, saturation and parasitic diode mode. This paper shows the results of a study on thermal characterization according to those electrical characteristics and parameters. The thermal resistance is defined by the function of the temperature difference between junction to referenced temperature and the power dissipation between them. Therefore, the thermal resistance has a different value due to different heating characteristics such as linear mode, saturation mode and diode mode heating respectively. For this paper, thermal simulation and measurement were conducted using CFD simulation and experimentation. In the results illustrated various thermal characteristics depending on the different structure of packages having either Al bonding directly to the substrate or Al bonding to the lead frame with DBC substrate.</description><subject>Abstracts</subject><subject>Bonding</subject><subject>Electrical resistance measurement</subject><subject>Heating</subject><subject>Resistance</subject><subject>Substrates</subject><isbn>9781467361385</isbn><isbn>1467361380</isbn><isbn>1467361399</isbn><isbn>9781467361378</isbn><isbn>9781467361392</isbn><isbn>1467361372</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2013</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNo1UNtKxDAUjIigrv0CEfIDW3Nr0jwuS73Agg_qczmmp220bUraVdavt-jKPMwMc848DCE3nKWcM3tb7GN49n2RCsZlqjNhrRIn5JIrbaTm0tpTkliT__s8OyfJNL0zxpZ_s-CClBs6hE_saI9zG6rQheZA6xDp3GLsoaOuhQhuxui_YfZhoKGmY_jCSEdwH9DgRP1AW9-01O1jxGGmMI6dd7_X0xU5q6GbMDnyirzeFS_bh_Xu6f5xu9mtPTfZvJa1UJng2oFTiudaoQZljKjewCqzKMM0VFILKbQWmVFMudrKyqkldtbJFbn-6_WIWI7R9xAP5XET-QN63FdJ</recordid><startdate>201304</startdate><enddate>201304</enddate><creator>Lee, ByoungOk</creator><creator>A-Rom Moon</creator><creator>JoonSeo Son</creator><creator>JiHwan Kim</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>201304</creationdate><title>A novel methodology for thermal characterization of power packages in high current applications</title><author>Lee, ByoungOk ; A-Rom Moon ; JoonSeo Son ; JiHwan Kim</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-3f245216cac441864e6a4772dba947477706ad3623266257404cf93dc4947c9c3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2013</creationdate><topic>Abstracts</topic><topic>Bonding</topic><topic>Electrical resistance measurement</topic><topic>Heating</topic><topic>Resistance</topic><topic>Substrates</topic><toplevel>online_resources</toplevel><creatorcontrib>Lee, ByoungOk</creatorcontrib><creatorcontrib>A-Rom Moon</creatorcontrib><creatorcontrib>JoonSeo Son</creatorcontrib><creatorcontrib>JiHwan Kim</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Lee, ByoungOk</au><au>A-Rom Moon</au><au>JoonSeo Son</au><au>JiHwan Kim</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A novel methodology for thermal characterization of power packages in high current applications</atitle><btitle>2013 14th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)</btitle><stitle>EuroSimE</stitle><date>2013-04</date><risdate>2013</risdate><spage>1</spage><epage>6</epage><pages>1-6</pages><isbn>9781467361385</isbn><isbn>1467361380</isbn><eisbn>1467361399</eisbn><eisbn>9781467361378</eisbn><eisbn>9781467361392</eisbn><eisbn>1467361372</eisbn><abstract>This article describes the thermal characterization of semiconductor packages that include MOSFET solutions for high current capability applications. MOSFETs have three kinds of electrical characteristic parameters in regards to the heat generation of the silicon die, such as linear, saturation and parasitic diode mode. This paper shows the results of a study on thermal characterization according to those electrical characteristics and parameters. The thermal resistance is defined by the function of the temperature difference between junction to referenced temperature and the power dissipation between them. Therefore, the thermal resistance has a different value due to different heating characteristics such as linear mode, saturation mode and diode mode heating respectively. For this paper, thermal simulation and measurement were conducted using CFD simulation and experimentation. In the results illustrated various thermal characteristics depending on the different structure of packages having either Al bonding directly to the substrate or Al bonding to the lead frame with DBC substrate.</abstract><pub>IEEE</pub><doi>10.1109/EuroSimE.2013.6529942</doi><tpages>6</tpages></addata></record> |
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| language | eng |
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| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Abstracts Bonding Electrical resistance measurement Heating Resistance Substrates |
| title | A novel methodology for thermal characterization of power packages in high current applications |
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