Comparison of electrical techniques for temperature evaluation in power MOS transistors

Three electrical techniques (pulsed-gate, AC-conductance and sense-diode) for temperature evaluation in power MOS transistors have been experimentally compared on the same device. The device under test is a silicon-on-insulator (SOI) laterally-diffused MOSFET (LDMOS) design with embedded sense-diode...

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Hauptverfasser: Ferrara, A., Steeneken, P. G., Reimann, K., Heringa, A., Yan, L., Boksteen, B. K., Swanenberg, M., Koops, G. E. J., Scholten, A. J., Surdeanu, R., Schmitz, J., Hueting, R. J. E.
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creator Ferrara, A.
Steeneken, P. G.
Reimann, K.
Heringa, A.
Yan, L.
Boksteen, B. K.
Swanenberg, M.
Koops, G. E. J.
Scholten, A. J.
Surdeanu, R.
Schmitz, J.
Hueting, R. J. E.
description Three electrical techniques (pulsed-gate, AC-conductance and sense-diode) for temperature evaluation in power MOS transistors have been experimentally compared on the same device. The device under test is a silicon-on-insulator (SOI) laterally-diffused MOSFET (LDMOS) design with embedded sense-diodes in the center and at the edge of the device for providing local temperature information. On-wafer measurements have been performed on a thermal chuck in the temperature range 25-200°C to extract self-heating information and predict the junction temperature for different biasing conditions. Good agreement (within 10%) between the different techniques is achieved, evidencing that reliable temperature estimations can be made using each of the proposed electrical techniques. As a result, factors other than experimental accuracy will play a role in the choice of the most adequate technique for the application of interest. Guidelines for this choice are provided in a benchmarking analysis accounting for ease of application, temperature calibration and accuracy of the results.
doi_str_mv 10.1109/ICMTS.2013.6528156
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J.</au><au>Surdeanu, R.</au><au>Schmitz, J.</au><au>Hueting, R. J. E.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Comparison of electrical techniques for temperature evaluation in power MOS transistors</atitle><btitle>2013 IEEE International Conference on Microelectronic Test Structures (ICMTS)</btitle><stitle>ICMTS</stitle><date>2013-01-01</date><risdate>2013</risdate><spage>115</spage><epage>120</epage><pages>115-120</pages><issn>1071-9032</issn><eissn>2158-1029</eissn><isbn>9781467348454</isbn><isbn>1467348457</isbn><eisbn>1467348481</eisbn><eisbn>9781467348478</eisbn><eisbn>1467348473</eisbn><eisbn>9781467348485</eisbn><abstract>Three electrical techniques (pulsed-gate, AC-conductance and sense-diode) for temperature evaluation in power MOS transistors have been experimentally compared on the same device. The device under test is a silicon-on-insulator (SOI) laterally-diffused MOSFET (LDMOS) design with embedded sense-diodes in the center and at the edge of the device for providing local temperature information. On-wafer measurements have been performed on a thermal chuck in the temperature range 25-200°C to extract self-heating information and predict the junction temperature for different biasing conditions. Good agreement (within 10%) between the different techniques is achieved, evidencing that reliable temperature estimations can be made using each of the proposed electrical techniques. As a result, factors other than experimental accuracy will play a role in the choice of the most adequate technique for the application of interest. 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subjects AC-conductance
Calibration
Junctions
Logic gates
power MOS
pulsed-gate
self-heating
sense-diode
Temperature
Temperature distribution
Temperature measurement
Temperature sensors
thermal resistance
title Comparison of electrical techniques for temperature evaluation in power MOS transistors
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