Analyzing the effect of concurrent variability in the core cells and sense amplifiers on SRAM read access failures

Conventionally, the access failures in SRAMs are treated at core cell level by means of differential bit line voltage analysis. In this work it is shown that under the assumption of random process variability, the conventional approach no longer suffices. It still holds that the differential bit lin...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Vatajelu, E. I., Bosio, A., Dilillo, L., Girard, P., Todri, A., Virazel, A., Badereddine, N.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Arrays Discharges (electric) Engineering Sciences Failure Probability Estimation Measurement Micro and nanotechnologies Microelectronics Sense Amplifier SRAM cells SRAM Memory Threshold voltage Transistors
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