A 5.2-Gb/s Low-Swing Voltage-Mode Transmitter With an AC-/DC-Coupled Equalizer and a Voltage Offset Generator
This paper describes a voltage-mode transmitter with an AC-/DC-coupled equalizer. A dual-loop regulator controls the tap-weight coefficient for the DC-coupled equalizer while maintaining the output matching condition. An AC-coupling technique is employed to enhance the edge rate and reduce the burde...
Gespeichert in:
| Veröffentlicht in: | IEEE transactions on circuits and systems. I, Regular papers Regular papers, 2014-01, Vol.61 (1), p.213-225 |
|---|---|
| Hauptverfasser: | , , , , |
| Format: | Artikel |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 225 |
|---|---|
| container_issue | 1 |
| container_start_page | 213 |
| container_title | IEEE transactions on circuits and systems. I, Regular papers |
| container_volume | 61 |
| creator | Kim, Seok Jeong, Youngkyun Lee, Mira Kwon, Kee-Won Chun, Jung-Hoon |
| description | This paper describes a voltage-mode transmitter with an AC-/DC-coupled equalizer. A dual-loop regulator controls the tap-weight coefficient for the DC-coupled equalizer while maintaining the output matching condition. An AC-coupling technique is employed to enhance the edge rate and reduce the burden of the DC-coupled equalizer. The transmitter also supports the ability to add a DC differential voltage offset into the output signal so that the voltage margin of the link can be measured. The transmitter was fabricated using a 0.13-um CMOS technology. When 240- mV PP , 5.2-Gb/s data are sent over 20-inch FR4 channels, the eye of the received data has a voltage margin of 60 mV and a peak-to-peak jitter of 40 ps. The proposed transmitter consumes 5.86 mW from a 1.2-V supply while operating at 5.2 Gb/s. |
| doi_str_mv | 10.1109/TCSI.2013.2262186 |
| format | Article |
| fullrecord | <record><control><sourceid>crossref_RIE</sourceid><recordid>TN_cdi_ieee_primary_6519975</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>6519975</ieee_id><sourcerecordid>10_1109_TCSI_2013_2262186</sourcerecordid><originalsourceid>FETCH-LOGICAL-c265t-146d3a14f2f07c142ff816b7d709ccf6933c49d67d5b36f08db630333aaffbb73</originalsourceid><addsrcrecordid>eNo9kE9PwjAAxRujiYh-AOOlX6Cjf9auPZKJSILhwNTj0q0tzowN2xKin14W0NN7h_d7hx8A9wQnhGA1KfL1IqGYsIRSQYkUF2BEOJcISywuh54qJBmV1-AmhE-MqcKMjMB2CnlC0byaBLjsD2h9aLoNfOvbqDcWvfTGwsLrLmybGK2H7038gLqD0xxNHnOU9_tdaw2cfe112_wcB7ozUP_xcOVcsBHObWe9jr2_BVdOt8HenXMMXp9mRf6Mlqv5Ip8uUU0Fj4ikwjBNUkcdzmqSUuckEVVmMqzq2gnFWJ0qIzLDKyYclqYSDDPGtHauqjI2BuT0W_s-BG9dufPNVvvvkuBy8FUOvsrBV3n2dWQeTkxjrf3fC06Uyjj7BS4JZZs</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype></control><display><type>article</type><title>A 5.2-Gb/s Low-Swing Voltage-Mode Transmitter With an AC-/DC-Coupled Equalizer and a Voltage Offset Generator</title><source>IEEE Xplore</source><creator>Kim, Seok ; Jeong, Youngkyun ; Lee, Mira ; Kwon, Kee-Won ; Chun, Jung-Hoon</creator><creatorcontrib>Kim, Seok ; Jeong, Youngkyun ; Lee, Mira ; Kwon, Kee-Won ; Chun, Jung-Hoon</creatorcontrib><description>This paper describes a voltage-mode transmitter with an AC-/DC-coupled equalizer. A dual-loop regulator controls the tap-weight coefficient for the DC-coupled equalizer while maintaining the output matching condition. An AC-coupling technique is employed to enhance the edge rate and reduce the burden of the DC-coupled equalizer. The transmitter also supports the ability to add a DC differential voltage offset into the output signal so that the voltage margin of the link can be measured. The transmitter was fabricated using a 0.13-um CMOS technology. When 240- mV PP , 5.2-Gb/s data are sent over 20-inch FR4 channels, the eye of the received data has a voltage margin of 60 mV and a peak-to-peak jitter of 40 ps. The proposed transmitter consumes 5.86 mW from a 1.2-V supply while operating at 5.2 Gb/s.</description><identifier>ISSN: 1549-8328</identifier><identifier>EISSN: 1558-0806</identifier><identifier>DOI: 10.1109/TCSI.2013.2262186</identifier><identifier>CODEN: ITCSCH</identifier><language>eng</language><publisher>IEEE</publisher><subject>AC-coupled equalization ; impedance matching ; tap-weight control ; voltage offset generation ; voltage-mode transmitter</subject><ispartof>IEEE transactions on circuits and systems. I, Regular papers, 2014-01, Vol.61 (1), p.213-225</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c265t-146d3a14f2f07c142ff816b7d709ccf6933c49d67d5b36f08db630333aaffbb73</citedby><cites>FETCH-LOGICAL-c265t-146d3a14f2f07c142ff816b7d709ccf6933c49d67d5b36f08db630333aaffbb73</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6519975$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6519975$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Kim, Seok</creatorcontrib><creatorcontrib>Jeong, Youngkyun</creatorcontrib><creatorcontrib>Lee, Mira</creatorcontrib><creatorcontrib>Kwon, Kee-Won</creatorcontrib><creatorcontrib>Chun, Jung-Hoon</creatorcontrib><title>A 5.2-Gb/s Low-Swing Voltage-Mode Transmitter With an AC-/DC-Coupled Equalizer and a Voltage Offset Generator</title><title>IEEE transactions on circuits and systems. I, Regular papers</title><addtitle>TCSI</addtitle><description>This paper describes a voltage-mode transmitter with an AC-/DC-coupled equalizer. A dual-loop regulator controls the tap-weight coefficient for the DC-coupled equalizer while maintaining the output matching condition. An AC-coupling technique is employed to enhance the edge rate and reduce the burden of the DC-coupled equalizer. The transmitter also supports the ability to add a DC differential voltage offset into the output signal so that the voltage margin of the link can be measured. The transmitter was fabricated using a 0.13-um CMOS technology. When 240- mV PP , 5.2-Gb/s data are sent over 20-inch FR4 channels, the eye of the received data has a voltage margin of 60 mV and a peak-to-peak jitter of 40 ps. The proposed transmitter consumes 5.86 mW from a 1.2-V supply while operating at 5.2 Gb/s.</description><subject>AC-coupled equalization</subject><subject>impedance matching</subject><subject>tap-weight control</subject><subject>voltage offset generation</subject><subject>voltage-mode transmitter</subject><issn>1549-8328</issn><issn>1558-0806</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2014</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kE9PwjAAxRujiYh-AOOlX6Cjf9auPZKJSILhwNTj0q0tzowN2xKin14W0NN7h_d7hx8A9wQnhGA1KfL1IqGYsIRSQYkUF2BEOJcISywuh54qJBmV1-AmhE-MqcKMjMB2CnlC0byaBLjsD2h9aLoNfOvbqDcWvfTGwsLrLmybGK2H7038gLqD0xxNHnOU9_tdaw2cfe112_wcB7ozUP_xcOVcsBHObWe9jr2_BVdOt8HenXMMXp9mRf6Mlqv5Ip8uUU0Fj4ikwjBNUkcdzmqSUuckEVVmMqzq2gnFWJ0qIzLDKyYclqYSDDPGtHauqjI2BuT0W_s-BG9dufPNVvvvkuBy8FUOvsrBV3n2dWQeTkxjrf3fC06Uyjj7BS4JZZs</recordid><startdate>201401</startdate><enddate>201401</enddate><creator>Kim, Seok</creator><creator>Jeong, Youngkyun</creator><creator>Lee, Mira</creator><creator>Kwon, Kee-Won</creator><creator>Chun, Jung-Hoon</creator><general>IEEE</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>201401</creationdate><title>A 5.2-Gb/s Low-Swing Voltage-Mode Transmitter With an AC-/DC-Coupled Equalizer and a Voltage Offset Generator</title><author>Kim, Seok ; Jeong, Youngkyun ; Lee, Mira ; Kwon, Kee-Won ; Chun, Jung-Hoon</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c265t-146d3a14f2f07c142ff816b7d709ccf6933c49d67d5b36f08db630333aaffbb73</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2014</creationdate><topic>AC-coupled equalization</topic><topic>impedance matching</topic><topic>tap-weight control</topic><topic>voltage offset generation</topic><topic>voltage-mode transmitter</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Kim, Seok</creatorcontrib><creatorcontrib>Jeong, Youngkyun</creatorcontrib><creatorcontrib>Lee, Mira</creatorcontrib><creatorcontrib>Kwon, Kee-Won</creatorcontrib><creatorcontrib>Chun, Jung-Hoon</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Xplore</collection><collection>CrossRef</collection><jtitle>IEEE transactions on circuits and systems. I, Regular papers</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Kim, Seok</au><au>Jeong, Youngkyun</au><au>Lee, Mira</au><au>Kwon, Kee-Won</au><au>Chun, Jung-Hoon</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A 5.2-Gb/s Low-Swing Voltage-Mode Transmitter With an AC-/DC-Coupled Equalizer and a Voltage Offset Generator</atitle><jtitle>IEEE transactions on circuits and systems. I, Regular papers</jtitle><stitle>TCSI</stitle><date>2014-01</date><risdate>2014</risdate><volume>61</volume><issue>1</issue><spage>213</spage><epage>225</epage><pages>213-225</pages><issn>1549-8328</issn><eissn>1558-0806</eissn><coden>ITCSCH</coden><abstract>This paper describes a voltage-mode transmitter with an AC-/DC-coupled equalizer. A dual-loop regulator controls the tap-weight coefficient for the DC-coupled equalizer while maintaining the output matching condition. An AC-coupling technique is employed to enhance the edge rate and reduce the burden of the DC-coupled equalizer. The transmitter also supports the ability to add a DC differential voltage offset into the output signal so that the voltage margin of the link can be measured. The transmitter was fabricated using a 0.13-um CMOS technology. When 240- mV PP , 5.2-Gb/s data are sent over 20-inch FR4 channels, the eye of the received data has a voltage margin of 60 mV and a peak-to-peak jitter of 40 ps. The proposed transmitter consumes 5.86 mW from a 1.2-V supply while operating at 5.2 Gb/s.</abstract><pub>IEEE</pub><doi>10.1109/TCSI.2013.2262186</doi><tpages>13</tpages></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISSN: 1549-8328 |
| ispartof | IEEE transactions on circuits and systems. I, Regular papers, 2014-01, Vol.61 (1), p.213-225 |
| issn | 1549-8328 1558-0806 |
| language | eng |
| recordid | cdi_ieee_primary_6519975 |
| source | IEEE Xplore |
| subjects | AC-coupled equalization impedance matching tap-weight control voltage offset generation voltage-mode transmitter |
| title | A 5.2-Gb/s Low-Swing Voltage-Mode Transmitter With an AC-/DC-Coupled Equalizer and a Voltage Offset Generator |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-07T16%3A21%3A15IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-crossref_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=A%205.2-Gb/s%20Low-Swing%20Voltage-Mode%20Transmitter%20With%20an%20AC-/DC-Coupled%20Equalizer%20and%20a%20Voltage%20Offset%20Generator&rft.jtitle=IEEE%20transactions%20on%20circuits%20and%20systems.%20I,%20Regular%20papers&rft.au=Kim,%20Seok&rft.date=2014-01&rft.volume=61&rft.issue=1&rft.spage=213&rft.epage=225&rft.pages=213-225&rft.issn=1549-8328&rft.eissn=1558-0806&rft.coden=ITCSCH&rft_id=info:doi/10.1109/TCSI.2013.2262186&rft_dat=%3Ccrossref_RIE%3E10_1109_TCSI_2013_2262186%3C/crossref_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=6519975&rfr_iscdi=true |