A 210-GHz Amplifier in 40-nm Digital CMOS Technology
This paper presents a 210-GHz amplifier design in 40-nm digital bulk CMOS technology. The theoretical maximum voltage gain that an amplifier can achieve and the loss of a matching network are derived for the optimization of a few hundred gigahertz amplifiers. Accordingly, the bias and size of transi...
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| Veröffentlicht in: | IEEE transactions on microwave theory and techniques 2013-06, Vol.61 (6), p.2438-2446 |
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| container_title | IEEE transactions on microwave theory and techniques |
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| creator | KO, Chun-Lin LI, Chun-Hsing KUO, Chien-Nan KUO, Ming-Ching CHANG, Da-Chiang |
| description | This paper presents a 210-GHz amplifier design in 40-nm digital bulk CMOS technology. The theoretical maximum voltage gain that an amplifier can achieve and the loss of a matching network are derived for the optimization of a few hundred gigahertz amplifiers. Accordingly, the bias and size of transistors, circuit topology, and inter-stage coupling method can be determined methodically to maximize the amplifier gain. The measured results show that the amplifier exhibits a peak power gain of 10.5 dB at 213.5 GHz and an estimated 3-dB bandwidth of 13 GHz. The power consumption is only 42.3 mW under a 0.8-V supply. To the best of the authors' knowledge, this work demonstrates the CMOS amplifier with highest operation frequency reported thus far. |
| doi_str_mv | 10.1109/TMTT.2013.2260767 |
| format | Article |
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The theoretical maximum voltage gain that an amplifier can achieve and the loss of a matching network are derived for the optimization of a few hundred gigahertz amplifiers. Accordingly, the bias and size of transistors, circuit topology, and inter-stage coupling method can be determined methodically to maximize the amplifier gain. The measured results show that the amplifier exhibits a peak power gain of 10.5 dB at 213.5 GHz and an estimated 3-dB bandwidth of 13 GHz. The power consumption is only 42.3 mW under a 0.8-V supply. To the best of the authors' knowledge, this work demonstrates the CMOS amplifier with highest operation frequency reported thus far.</description><identifier>ISSN: 0018-9480</identifier><identifier>EISSN: 1557-9670</identifier><identifier>DOI: 10.1109/TMTT.2013.2260767</identifier><identifier>CODEN: IETMAB</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Amplification ; Amplifier ; Amplifiers ; Applied sciences ; Circuit properties ; CMOS ; CMOS integrated circuits ; CMOS technology ; Design. Technologies. Operation analysis. Testing ; Digital ; Electric, optical and optoelectronic circuits ; Electronics ; Exact sciences and technology ; Gain ; Impedance ; Integrated circuits ; Matching ; maximum gain ; Microstrip ; Microwave circuits, microwave integrated circuits, microwave transmission lines, submillimeter wave circuits ; Networks ; Noise levels ; Power gain ; Semiconductor electronics. Microelectronics. Optoelectronics. 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(IEEE) Jun 2013</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c422t-3fdc9928951fdf0df74c6ae32f44b9146e7c14a53368c8339d0d842df47163863</citedby><cites>FETCH-LOGICAL-c422t-3fdc9928951fdf0df74c6ae32f44b9146e7c14a53368c8339d0d842df47163863</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6516105$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27903,27904,54737</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6516105$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=27483847$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>KO, Chun-Lin</creatorcontrib><creatorcontrib>LI, Chun-Hsing</creatorcontrib><creatorcontrib>KUO, Chien-Nan</creatorcontrib><creatorcontrib>KUO, Ming-Ching</creatorcontrib><creatorcontrib>CHANG, Da-Chiang</creatorcontrib><title>A 210-GHz Amplifier in 40-nm Digital CMOS Technology</title><title>IEEE transactions on microwave theory and techniques</title><addtitle>TMTT</addtitle><description>This paper presents a 210-GHz amplifier design in 40-nm digital bulk CMOS technology. The theoretical maximum voltage gain that an amplifier can achieve and the loss of a matching network are derived for the optimization of a few hundred gigahertz amplifiers. Accordingly, the bias and size of transistors, circuit topology, and inter-stage coupling method can be determined methodically to maximize the amplifier gain. The measured results show that the amplifier exhibits a peak power gain of 10.5 dB at 213.5 GHz and an estimated 3-dB bandwidth of 13 GHz. The power consumption is only 42.3 mW under a 0.8-V supply. To the best of the authors' knowledge, this work demonstrates the CMOS amplifier with highest operation frequency reported thus far.</description><subject>Amplification</subject><subject>Amplifier</subject><subject>Amplifiers</subject><subject>Applied sciences</subject><subject>Circuit properties</subject><subject>CMOS</subject><subject>CMOS integrated circuits</subject><subject>CMOS technology</subject><subject>Design. Technologies. Operation analysis. Testing</subject><subject>Digital</subject><subject>Electric, optical and optoelectronic circuits</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Gain</subject><subject>Impedance</subject><subject>Integrated circuits</subject><subject>Matching</subject><subject>maximum gain</subject><subject>Microstrip</subject><subject>Microwave circuits, microwave integrated circuits, microwave transmission lines, submillimeter wave circuits</subject><subject>Networks</subject><subject>Noise levels</subject><subject>Power gain</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>shunt stub matching</subject><subject>Theoretical study. Circuits analysis and design</subject><subject>Topology</subject><subject>Transistors</subject><subject>transmission line</subject><issn>0018-9480</issn><issn>1557-9670</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2013</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpdkE1LAzEQhoMoWKs_QLwsiOBlaybfOZaqrdDSg-s5xGxSU7a7ddMe6q93lxYPnoZhnneYeRC6BTwCwPqpWBTFiGCgI0IElkKeoQFwLnMtJD5HA4xB5ZopfImuUlp3LeNYDRAbZwRwPp39ZOPNtooh-jaLdcZwXm-y57iKO1tlk8XyPSu8-6qbqlkdrtFFsFXyN6c6RB-vL8Vkls-X07fJeJ47Rsgup6F0WhOlOYQy4DJI5oT1lATGPjUw4aUDZjmlQjlFqS5xqRgpA5MgqBJ0iB6Pe7dt8733aWc2MTlfVbb2zT4ZYCCVAqxYh97_Q9fNvq276wxQwbt_OScdBUfKtU1KrQ9m28aNbQ8GsOk9mt6j6T2ak8cu83DabJOzVWht7WL6CxLJFFWs5-6OXPTe_40FBwGY01_YWXZn</recordid><startdate>20130601</startdate><enddate>20130601</enddate><creator>KO, Chun-Lin</creator><creator>LI, Chun-Hsing</creator><creator>KUO, Chien-Nan</creator><creator>KUO, Ming-Ching</creator><creator>CHANG, Da-Chiang</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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Circuits analysis and design</topic><topic>Topology</topic><topic>Transistors</topic><topic>transmission line</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>KO, Chun-Lin</creatorcontrib><creatorcontrib>LI, Chun-Hsing</creatorcontrib><creatorcontrib>KUO, Chien-Nan</creatorcontrib><creatorcontrib>KUO, Ming-Ching</creatorcontrib><creatorcontrib>CHANG, Da-Chiang</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998–Present</collection><collection>IEEE Xplore</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><jtitle>IEEE transactions on microwave theory and techniques</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KO, Chun-Lin</au><au>LI, Chun-Hsing</au><au>KUO, Chien-Nan</au><au>KUO, Ming-Ching</au><au>CHANG, Da-Chiang</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A 210-GHz Amplifier in 40-nm Digital CMOS Technology</atitle><jtitle>IEEE transactions on microwave theory and techniques</jtitle><stitle>TMTT</stitle><date>2013-06-01</date><risdate>2013</risdate><volume>61</volume><issue>6</issue><spage>2438</spage><epage>2446</epage><pages>2438-2446</pages><issn>0018-9480</issn><eissn>1557-9670</eissn><coden>IETMAB</coden><abstract>This paper presents a 210-GHz amplifier design in 40-nm digital bulk CMOS technology. The theoretical maximum voltage gain that an amplifier can achieve and the loss of a matching network are derived for the optimization of a few hundred gigahertz amplifiers. Accordingly, the bias and size of transistors, circuit topology, and inter-stage coupling method can be determined methodically to maximize the amplifier gain. The measured results show that the amplifier exhibits a peak power gain of 10.5 dB at 213.5 GHz and an estimated 3-dB bandwidth of 13 GHz. The power consumption is only 42.3 mW under a 0.8-V supply. To the best of the authors' knowledge, this work demonstrates the CMOS amplifier with highest operation frequency reported thus far.</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/TMTT.2013.2260767</doi><tpages>9</tpages></addata></record> |
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| subjects | Amplification Amplifier Amplifiers Applied sciences Circuit properties CMOS CMOS integrated circuits CMOS technology Design. Technologies. Operation analysis. Testing Digital Electric, optical and optoelectronic circuits Electronics Exact sciences and technology Gain Impedance Integrated circuits Matching maximum gain Microstrip Microwave circuits, microwave integrated circuits, microwave transmission lines, submillimeter wave circuits Networks Noise levels Power gain Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices shunt stub matching Theoretical study. Circuits analysis and design Topology Transistors transmission line |
| title | A 210-GHz Amplifier in 40-nm Digital CMOS Technology |
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