Temporal-based procedure reordering for improved instruction cache performance

As the gap between memory and processor performance continues to grow, it becomes increasingly important to exploit cache memory effectively. Both hardware and software techniques can be used to better utilize the cache. Hardware solutions focus on organization, while most software solutions investi...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Kalamationos, J., Kaeli, D.R.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Cache memory Frequency Hardware Information analysis Microprocessors Performance analysis
Online-Zugang:	Volltext bestellen
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