A 0.27mm2 13.5dBm 2.4GHz all-digital polar transmitter using 34%-efficiency Class-D DPA in 40nm CMOS

An all-digital polar transmit (TX) architecture exhibits advantages of low cost, low power, as well as reconfigurability with full usage of digital computational power. The design challenge is the need for continuous innovation to further enhance power efficiency and minimize silicon area while achi...

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Hauptverfasser:	Jie-Wei Lai, Chi-Hsueh Wang, Kaipon Kao, Anson Lin, Yi-Hsien Cho, Lanchou Cho, Meng-Hsiung Hung, Xin-Yu Shih, Che-Min Lin, Sheng-Hong Yan, Yuan-Hung Chung, Liang, P. C. P., Guang-Kaai Dehng, Hung-Sung Li, Chien, G., Staszewski, R. B.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Bluetooth Clocks CMOS integrated circuits Frequency modulation Phase locked loops Radio frequency System-on-chip
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