A 95fJ/b current-mode transceiver for 10mm on-chip interconnect

Data communication between local system blocks through on-chip global interconnects presents significant design challenges in scaled VLSI systems. The goal of this research is to reduce the energy consumed per bit transmitted, while achieving Gb/s data rates over interconnect lengths up to 10mm. Vol...

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Bibliographische Detailangaben

Hauptverfasser:	Seon-Kyoo Lee, Seung-Hun Lee, Sylvester, D., Blaauw, D., Jae-Yoon Sim
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Bit error rate CMOS integrated circuits Integrated circuit interconnections Receivers System-on-chip Transceivers Transmitters
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