Design of ternary adiabatic Domino multiplier

By researching the adiabatic Domino circuit and the multiplier, a novel design of low power ternary multiplier on switch-level is proposed. First, the switch-level structure of ternary multiplier's product circuit and carry circuit are derived according to the switch-signal theory and the pecul...

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Hauptverfasser: Peng-Jun Wang, Qian-Kun Yang, Xue-Song Zheng
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Qian-Kun Yang
Xue-Song Zheng
description By researching the adiabatic Domino circuit and the multiplier, a novel design of low power ternary multiplier on switch-level is proposed. First, the switch-level structure of ternary multiplier's product circuit and carry circuit are derived according to the switch-signal theory and the peculiarity of adiabatic Domino circuit. The design of the one bit adiabatic Domino multiplier unit and the four bits multiplier are obtained. Finally, the circuit is simulated by Spice tool and the results show that the logic function of the four bits adiabatic Domino multiplier is correct. The energy consumption of the four bits adiabatic Domino multiplier is 58% less than the conventional Domino counterpart.
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First, the switch-level structure of ternary multiplier's product circuit and carry circuit are derived according to the switch-signal theory and the peculiarity of adiabatic Domino circuit. The design of the one bit adiabatic Domino multiplier unit and the four bits multiplier are obtained. Finally, the circuit is simulated by Spice tool and the results show that the logic function of the four bits adiabatic Domino multiplier is correct. The energy consumption of the four bits adiabatic Domino multiplier is 58% less than the conventional Domino counterpart.</abstract><pub>IEEE</pub><doi>10.1109/ICSICT.2012.6467890</doi><tpages>3</tpages></addata></record>
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subjects Adiabatic logic
Clocks
Domino circuit
Energy consumption
Low voltage
Power demand
Switch-signal theory
Switches
Switching circuits
Ternary adder
title Design of ternary adiabatic Domino multiplier
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