Stacking Graphene Channels in Parallel for Enhanced Performance With the Same Footprint
Using the unique ability of graphene to be transferred to virtually any surface, field-effect transistors are demonstrated with vertically stacked graphene channels that are electrically connected in parallel. The graphene in each layer is double gated, with all gates in the stack connected to a com...
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| Veröffentlicht in: | IEEE electron device letters 2013-04, Vol.34 (4), p.556-558 |
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| container_end_page | 558 |
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| container_issue | 4 |
| container_start_page | 556 |
| container_title | IEEE electron device letters |
| container_volume | 34 |
| creator | Franklin, A. D. Oida, S. Farmer, D. B. Smith, J. T. Shu-Jen Han Breslin, C. M. Gignac, L. |
| description | Using the unique ability of graphene to be transferred to virtually any surface, field-effect transistors are demonstrated with vertically stacked graphene channels that are electrically connected in parallel. The graphene in each layer is double gated, with all gates in the stack connected to a common gate electrode. We show that the performance of these devices scales linearly with the number of stacked graphene channels at rates of approximately 500 μA/μm and 200 μS/μm per layer for the on-current and peak transconductance, respectively. This demonstration reveals the ability to employ graphene in a novel fashion for tuning and amplifying the performance of a transistor without changing the device footprint. |
| doi_str_mv | 10.1109/LED.2013.2242428 |
| format | Article |
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D.</creatorcontrib><creatorcontrib>Oida, S.</creatorcontrib><creatorcontrib>Farmer, D. B.</creatorcontrib><creatorcontrib>Smith, J. T.</creatorcontrib><creatorcontrib>Shu-Jen Han</creatorcontrib><creatorcontrib>Breslin, C. M.</creatorcontrib><creatorcontrib>Gignac, L.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><jtitle>IEEE electron device letters</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Franklin, A. D.</au><au>Oida, S.</au><au>Farmer, D. B.</au><au>Smith, J. T.</au><au>Shu-Jen Han</au><au>Breslin, C. M.</au><au>Gignac, L.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Stacking Graphene Channels in Parallel for Enhanced Performance With the Same Footprint</atitle><jtitle>IEEE electron device letters</jtitle><stitle>LED</stitle><date>2013-04-01</date><risdate>2013</risdate><volume>34</volume><issue>4</issue><spage>556</spage><epage>558</epage><pages>556-558</pages><issn>0741-3106</issn><eissn>1558-0563</eissn><coden>EDLEDZ</coden><abstract>Using the unique ability of graphene to be transferred to virtually any surface, field-effect transistors are demonstrated with vertically stacked graphene channels that are electrically connected in parallel. The graphene in each layer is double gated, with all gates in the stack connected to a common gate electrode. We show that the performance of these devices scales linearly with the number of stacked graphene channels at rates of approximately 500 μA/μm and 200 μS/μm per layer for the on-current and peak transconductance, respectively. This demonstration reveals the ability to employ graphene in a novel fashion for tuning and amplifying the performance of a transistor without changing the device footprint.</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/LED.2013.2242428</doi><tpages>3</tpages></addata></record> |
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| ispartof | IEEE electron device letters, 2013-04, Vol.34 (4), p.556-558 |
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| language | eng |
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| source | IEEE Electronic Library (IEL) |
| subjects | Applied sciences Dielectrics Double gate Electronics Exact sciences and technology field-effect transistor (FET) Graphene Logic gates parallel channels Performance evaluation Scanning electron microscopy Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices stacked Transconductance Transistors |
| title | Stacking Graphene Channels in Parallel for Enhanced Performance With the Same Footprint |
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