The multicluster architecture: reducing cycle time through partitioning

The multicluster architecture that we introduce offers a decentralized, dynamically scheduled architecture, in which the register files, dispatch queue, and functional units of the architecture are distributed across multiple clusters, and each cluster is assigned a subset of the architectural regis...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Farkas, K.I., Chow, P., Jouppi, N.P., Vranesic, Z.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Clocks Computer architecture Counting circuits Hardware Microprocessors Partitioning algorithms Registers Scheduling algorithm Signal processing Timing
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!